公开(公告)号：US09231602B1

公开(公告)日：2016-01-05

申请号：US14490115

申请日：2014-09-18

Applicant: Intel IP Corporation

Inventor： Elan Banin ,  Rotem Banin ,  Ofir Degani ,  Ran Shimon ,  Ashoke Ravi

IPC: H03L7/06 ,  H03L7/08 ,  G04F10/00

CPC classification number: G04F10/005 ,  H03L7/085 ,  H03L2207/50

Abstract: A digital phase locked loop operates with a time-to-digital converter and an a-priori-probability-phase-estimation component or estimator component that estimates the un-quantized phase associated with a quantization output of the time-to-digital converter. The time-to-digital converter generates a quantized value as the quantization output from a local oscillator signal of a local oscillator and a reference signal of a reference clock. The estimation component estimates a phase value from the quantized values as a function of a-priori data related to the time-to-digital converter and boundaries of the quantized value.

Abstract translation: 数字锁相环用时间数字转换器和估计与时间数字转换器的量化输出相关联的未量化相位的先验概率相位估计分量或估计器分量进行操作。 时间 - 数字转换器产生量化值作为本地振荡器的本地振荡器信号和参考时钟的参考信号的量化输出。 估计分量从作为与时间 - 数字转换器相关的先验数据和量化值的边界的函数的量化值估计相位值。

公开(公告)号：US10680619B2

公开(公告)日：2020-06-09

申请号：US16170716

申请日：2018-10-25

Applicant: Intel IP Corporation

Inventor： Elan Banin ,  Roy Amel ,  Ran Shimon ,  Ashoke Ravi ,  Nati Dinur

IPC: H03L7/08 ,  H04L27/00 ,  H03L7/085 ,  H03L9/00

Abstract: A Digital Phase Locked Loop (DPLL), including a Time-to-Digital Converter (TDC) configured generate quantized phase values of a controlled oscillator signal; and a frequency estimation circuit configured to receive the quantized phase values, determine wraparound phase of the quantized phase values, and estimate a frequency based on the quantized phase values and the wraparound phase.

公开(公告)号：US20190068200A1

公开(公告)日：2019-02-28

申请号：US16170716

申请日：2018-10-25

Applicant: Intel IP Corporation

Inventor： Elan Banin ,  Roy Amel ,  Ran Shimon ,  Ashoke Ravi ,  Nati Dinur

IPC: H03L7/08 ,  H04L27/00 ,  H03L7/085

Abstract: A Digital Phase Locked Loop (DPLL), including a Time-to-Digital Converter (TDC) configured generate quantized phase values of a controlled oscillator signal; and a frequency estimation circuit configured to receive the quantized phase values, determine wraparound phase of the quantized phase values, and estimate a frequency based on the quantized phase values and the wraparound phase.