DUAL CAPACITOR MIXED SIGNAL MUTIPLIER

    公开(公告)号:US20210224036A1

    公开(公告)日:2021-07-22

    申请号:US16744824

    申请日:2020-01-16

    IPC分类号: G06F7/523 G11C27/02 G06N3/063

    摘要: Mixed signal multipliers and methods for operating the same include a sampling capacitor and an accumulate capacitor. A sampling switch is configured to store an analog value on the sampling capacitor when a digital bit value of a digital signal is one and to store a zero when the digital bit value of the digital signal is a zero. An accumulate switch is configured to store an average of the stored value of the sampling capacitor and a previous stored value of the accumulate capacitor. A processor is configured to alternately trigger the sampling capacitor and the sampling capacitor for each bit value in the digital signal.