Memory Access Method, Buffer Scheduler and Memory Module
    21.
    发明申请
    Memory Access Method, Buffer Scheduler and Memory Module 有权
    内存访问方法,缓冲区调度程序和内存模块

    公开(公告)号:US20160085670A1

    公开(公告)日:2016-03-24

    申请号:US14953320

    申请日:2015-11-28

    Abstract: The present invention discloses a memory access method, a buffer scheduler, and a memory module, which can support multiple application scenarios without changing the memory module or a memory chip. The method includes: receiving an operation request message for memory access data, where the operation request message includes tag information of the memory access data, operation information of the memory access data, and a memory address of the memory access data; and performing, according to at least one of the tag information of the memory access data, a memory address of the memory access data, and the operation information of the memory access data, an operation on the tag of the memory access data and/or the memory access data stored in the memory module. The present invention is applicable to the computer field.

    Abstract translation: 本发明公开了一种存储器访问方法,缓冲器调度器和存储器模块,其可以在不改变存储器模块或存储器芯片的情况下支持多种应用场景。 该方法包括:接收用于存储器访问数据的操作请求消息,其中操作请求消息包括存储器访问数据的标签信息,存储器访问数据的操作信息和存储器访问数据的存储器地址; 并且根据存储器访问数据的标签信息,存储器访问数据的存储器地址和存储器访问数据的操作信息中的至少一个来执行对存储器访问数据的标签的操作和/或 存储器存储数据存储在存储器模块中。 本发明可应用于计算机领域。

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