公开(公告)号：US07375706B2

公开(公告)日：2008-05-20

申请号：US10962730

申请日：2004-10-12

Applicant: Po-Sheng Shih ,  Hsuan-Lin Pan

Inventor： Po-Sheng Shih ,  Hsuan-Lin Pan

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G02F1/13624 ,  G09G3/3659 ,  G09G2300/0447 ,  G09G2300/0465 ,  G09G2300/0814 ,  G09G2310/06 ,  G09G2320/0219

Abstract: A pixel region is surrounded in any adjacent scan lines and any adjacent data lines. Two thin film transistor (TFT) groups that are controlled by different scan lines are located in each pixel region. The two data lines respectively send different polarity data to the pixel region through the two TFT groups. At least one capacitor is used to couple with the two TFT groups for providing a coupling effect to make sure the voltage in the two connection points simultaneously goes up and down.

Abstract translation: 像素区域被包围在任何相邻的扫描线和任何相邻的数据线中。 由不同扫描线控制的两个薄膜晶体管（TFT）组位于每个像素区域中。 两条数据线通过两个TFT组分别向像素区发送不同的极性数据。 使用至少一个电容器与两个TFT组耦合以提供耦合效应，以确保两个连接点中的电压同时上升和下降。

公开(公告)号：US20070057977A1

公开(公告)日：2007-03-15

申请号：US11225115

申请日：2005-09-14

Applicant: Po-Sheng Shih ,  Hsuan-Lin Pan

Inventor： Po-Sheng Shih ,  Hsuan-Lin Pan

IPC: B41J3/00 ,  B41J2/175

CPC classification number: G02F1/136204 ,  G02F1/133308 ,  G02F2202/22

Abstract: A circuit for reducing the risk of electrostatic damage to flat panel displays during manufacture and use. A plurality of common voltage coupling points is provided for each of the plurality of driver integrated circuit, arranged to minimize the maximum distance between a signal line and a common voltage coupling point. This significantly reduces the potential for damage to the display by electrostatic discharge due to excessive active area voltage.

Abstract translation: 一种用于在制造和使用过程中降低对平板显示器的静电损伤风险的电路。 为多个驱动器集成电路中的每一个提供多个公共电压耦合点，其布置成使信号线和公共电压耦合点之间的最大距离最小化。 这显着降低了由于过大的有效面积电压而导致的静电放电对显示器的损坏的可能性。

公开(公告)号：US20050195139A1

公开(公告)日：2005-09-08

申请号：US10962730

申请日：2004-10-12

Applicant: Po-Sheng Shih ,  Hsuan-Lin Pan

Inventor： Po-Sheng Shih ,  Hsuan-Lin Pan

IPC: G02F1/1335 ,  G09G3/36

CPC classification number: G09G3/3614 ,  G02F1/13624 ,  G09G3/3659 ,  G09G2300/0447 ,  G09G2300/0465 ,  G09G2300/0814 ,  G09G2310/06 ,  G09G2320/0219

Abstract: A pixel region is surrounded in any adjacent scan lines and any adjacent data lines. Two thin film transistor (TFT) groups that are controlled by different scan lines are located in each pixel region. The two data lines respectively send different polarity data to the pixel region through the two TFT groups. At least one capacitor is used to couple with the two TFT groups for providing a coupling effect to make sure the voltage in the two connection points simultaneously goes up and down.

Abstract translation: 像素区域被包围在任何相邻的扫描线和任何相邻的数据线中。 由不同扫描线控制的两个薄膜晶体管（TFT）组位于每个像素区域中。 两条数据线通过两个TFT组分别向像素区发送不同的极性数据。 使用至少一个电容器与两个TFT组耦合以提供耦合效应，以确保两个连接点中的电压同时上升和下降。

公开(公告)号：US20090109132A1

公开(公告)日：2009-04-30

申请号：US12017345

申请日：2008-01-22

Applicant: Hsuan-Lin Pan ,  Chien-Yung Cheng

Inventor： Hsuan-Lin Pan ,  Chien-Yung Cheng

IPC: G09G3/20

CPC classification number: G09G3/3648

Abstract: A display apparatus and a method for driving a display panel thereof are provided. The display panel includes an inducing signal readout line and N gate lines, in which N is a natural number. The inducing signal readout line is coupled to a plurality of inducing circuits. Each inducing circuit is coupled to one of the gate lines, and the Nth gate line is coupled to one of the inducing circuits. In the method, several gate pulses are provided to drive the gate lines sequentially to turn on the corresponding inducing circuits, wherein at least a portion of the driving duration of a gate pulse provided to the Nth gate line is in a blanking time between two frames.

Abstract translation: 提供了一种用于驱动显示面板的显示装置和方法。 显示面板包括感应信号读出线和N条栅极线，其中N是自然数。 感应信号读出线耦合到多个感应电路。 每个感应电路耦合到一条栅极线，并且第N条栅极线耦合到一个感应电路。 在该方法中，提供多个栅极脉冲以依次驱动栅极线以导通相应的感应电路，其中提供给第N条栅极线的栅极脉冲的驱动持续时间的至少一部分处于两帧之间的消隐时间 。

公开(公告)号：US08508451B2

公开(公告)日：2013-08-13

申请号：US12017345

申请日：2008-01-22

Applicant: Hsuan-Lin Pan ,  Chien-Yung Cheng

Inventor： Hsuan-Lin Pan ,  Chien-Yung Cheng

IPC: G09G3/36

CPC classification number: G09G3/3648

Abstract: A display apparatus and a method for driving a display panel thereof are provided. The display panel includes an inducing signal readout line and N gate lines, in which N is a natural number. The inducing signal readout line is coupled to a plurality of inducing circuits. Each inducing circuit is coupled to one of the gate lines, and the Nth gate line is coupled to one of the inducing circuits. In the method, several gate pulses are provided to drive the gate lines sequentially to turn on the corresponding inducing circuits, wherein at least a portion of the driving duration of a gate pulse provided to the Nth gate line is in a blanking time between two frames.

Abstract translation: 提供了一种用于驱动显示面板的显示装置和方法。 显示面板包括感应信号读出线和N条栅极线，其中N是自然数。 感应信号读出线耦合到多个感应电路。 每个感应电路耦合到一条栅极线，并且第N条栅极线耦合到一个感应电路。 在该方法中，提供多个栅极脉冲以依次驱动栅极线以导通相应的感应电路，其中提供给第N条栅极线的栅极脉冲的驱动持续时间的至少一部分处于两帧之间的消隐时间 。