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21.发明公开公开(公告)号：US20240135882A1
公开(公告)日：2024-04-25
申请号：US18016903
申请日：2022-01-27
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan
IPC: G09G3/3258
CPC classification number: G09G3/3258
Abstract: A voltage supply circuit, a voltage supply method, a voltage supply module and a display device are provided. The voltage supply circuit includes a first node control circuit, a first control node control circuit, a second node control circuit and a driving voltage output circuit. The first node control circuit controls a potential of the first node; the first control node control circuit controls the potential of the first control node; the second node control circuit controls a potential of the second node; the driving voltage output circuit is electrically connected to the second node, the driving voltage output terminal and the initial voltage terminal respectively, and is configured to control the driving voltage output terminal to output a driving voltage according to the initial voltage provided by the initial voltage terminal under the control of the potential of the second node.
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公开(公告)号：US11937480B2
公开(公告)日：2024-03-19
申请号：US17869079
申请日：2022-07-20
Inventor： Zhongyuan Wu , Yongqian Li , Can Yuan , Zhidong Yuan , Meng Li , Dacheng Zhang , Lang Liu
IPC: H01L29/08 , H10K59/121 , H10K59/131 , H10K59/35 , H10K59/12
CPC classification number: H10K59/353 , H10K59/1213 , H10K59/1216 , H10K59/131 , H10K59/1201
Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a first transistor, a second transistor and a storage capacitor. The display substrate further includes an extension portion protruding from the gate electrode of the first transistor, and the extension portion is extended from the gate electrode of the first transistor in the second direction; the extension portion is at least partially overlapped with the first electrode of the second transistor in a direction perpendicular to the base substrate and is electrically connected with the first electrode of the second transistor; in the first direction, the extension portion has a second side closest to the second capacitor electrode, and the second side is recessed in a direction away from the second capacitor electrode.
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公开(公告)号：US11869411B2
公开(公告)日：2024-01-09
申请号：US17044190
申请日：2019-12-20
Inventor： Xuehuan Feng , Yongqian Li , Dacheng Zhang , Lang Liu
CPC classification number: G09G3/2092 , H01L27/1251 , H01L27/1255 , G09G2300/0842 , G09G2310/0267
Abstract: A display substrate includes: a base substrate; a first conductive pattern arranged on the base substrate; a first insulation layer arranged at a side of the first conductive pattern away from the base substrate; a second conductive pattern arranged at a side of the first insulation layer away from the base substrate; a second insulation layer arranged at a side of the second conductive pattern away from the base substrate; and a third conductive pattern arranged at a side of the second insulation layer away from the base substrate. The third conductive pattern and the first conductive pattern together serve as a first electrode plate of the capacitor, and the second conductive pattern serves as a second electrode plate of the capacitor.
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公开(公告)号：US11849617B2
公开(公告)日：2023-12-19
申请号：US16976796
申请日：2019-11-29
Inventor： Zhongyuan Wu , Yongqian Li , Can Yuan , Zhidong Yuan , Meng Li , Dacheng Zhang , Lang Liu
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
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25.发明授权公开(公告)号：US11848064B2
公开(公告)日：2023-12-19
申请号：US17791748
申请日：2020-12-26
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G11C19/28 , G09G3/20
CPC classification number: G11C19/28 , G09G3/20 , G09G3/3266 , G09G2310/0267 , G09G2310/0286
Abstract: A shift register includes a first scan unit, a leakage prevention unit, and a leakage prevention input unit. The first scan unit includes a first input circuit configured to transmit an input signal to a first pull-up node. The leakage prevention input unit is configured to: in response to a first voltage signal received at a first voltage signal terminal, transmit the first voltage signal to a leakage prevention input node; and in response to a second voltage signal received at a second voltage signal terminal, transmit the second voltage signal to the leakage prevention input node. The first voltage signal and the second voltage signal are mutually inverted signals. The leakage prevention unit is configured to transmit one of the first voltage signal and the second voltage signal from the leakage prevention input node to a first leakage prevention node.
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Patent Agency Ranking
公开(公告)号：US11842689B2
公开(公告)日：2023-12-12
申请号：US17619829
申请日：2021-02-09
Inventor： Yongqian Li , Xuehuan Feng
IPC: G09G3/3258 , G09G3/3233
CPC classification number: G09G3/3258 , G09G3/3233 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2310/0202 , G09G2310/0251 , G09G2310/08 , G09G2320/0233 , G09G2320/0257 , G09G2320/043 , G09G2320/045 , G09G2330/021
Abstract: A pixel circuit, a driving method of pixel circuit, and a display device are provided. The pixel circuit includes: a light emitting device, a driving sub-circuit, an energy storage sub-circuit, a data writing sub-circuit and a pull-down sub-circuit; the data writing sub-circuit is configured to control a voltage signal on a data line to be written into a control end of the driving sub-circuit in response to a data writing control signal; a first end of the driving sub-circuit is electrically connected to a target node, a second end of the driving sub-circuit is electrically connected to a power supply voltage, and the driving sub-circuit is configured to control a conduction of the driving sub-circuit under a control of a voltage on a control end of the driving sub-circuit.
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公开(公告)号：US11769457B2
公开(公告)日：2023-09-26
申请号：US17860347
申请日：2022-07-08
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2310/0286
Abstract: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output a banking output control signal to a first node in a blanking period of time of a frame; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal to the first node in a display period of time of the frame; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node, wherein the composite output signal includes a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other.
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公开(公告)号：US11769445B2
公开(公告)日：2023-09-26
申请号：US17793536
申请日：2021-09-02
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/32 , G09G3/3275 , H03K17/693
CPC classification number: G09G3/32 , G09G3/3275 , H03K17/693 , G09G2310/0297 , G09G2330/021
Abstract: A multiplexer circuit includes a first selection sub-circuit and a second selection sub-circuit. The first selection sub-circuit configured to transmit an input signal received at a input signal terminal to a first output terminal in response to a first control signal received at a first control terminal, and transmit a voltage of a power supply voltage terminal to the first output terminal in response to a second control signal received at a second control terminal. The second selection sub-circuit configured to transmit the input signal received at the input signal terminal to a second output terminal in response to a third control signal received at a third control terminal, and transmit the voltage of the power supply voltage terminal to the second output terminal in response to a fourth control signal received at a fourth control terminal.
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29.发明授权公开(公告)号：US11688316B2
公开(公告)日：2023-06-27
申请号：US17944523
申请日：2022-09-14
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/00 , G09G3/3275
CPC classification number: G09G3/006 , G09G3/3275 , G09G2330/12
Abstract: A pixel circuit includes a data line, a sensing line, a first pixel sub-circuit and a second pixel sub-circuit. The first pixel sub-circuit includes a first writing unit, a first sensing unit and a first driving unit. The first driving unit is configured to drive a first light-emitting unit to emit light. The second pixel sub-circuit includes a second writing unit, a second sensing unit and a second driving unit. The second driving unit is configured to drive a second light-emitting unit to emit light. The first writing unit and the second sensing unit are both configured to be connected to a gate driving unit. The second writing unit and the first sensing unit are both configured to be connected to another gate driving unit.
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30.发明授权公开(公告)号：US11663965B2
公开(公告)日：2023-05-30
申请号：US17468705
申请日：2021-09-08
Inventor： Xuehuan Feng , Yongqian Li , Yubao Kong
IPC: G09G3/30 , G09G3/3208 , G09G3/3233 , G09G3/3266
CPC classification number: G09G3/3208 , G09G3/3233 , G09G3/3266 , G09G2310/0286 , G09G2310/08 , G09G2320/0233 , G09G2330/021
Abstract: Disclosed are a display substrate and a display device. A display region and a peripheral region are included. The peripheral region includes a plurality of shift registers and a plurality of clock signal lines. The plurality of clock signal lines are arranged side by side in a first direction and include a first clock signal line to a Zth clock signal line, Z≥1. The shift registers are connected with gate lines in the display region and the first clock signal line to the Zth clock signal line respectively. There is at least a group of ith clock signal lines satisfying that the ith clock signal lines include X ith clock signal lines which are arranged one by one according to a sequence of connection with shift registers and further include N ith clock signal lines.
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