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公开(公告)号:US20220069052A1
公开(公告)日:2022-03-03
申请号:US17363216
申请日:2021-06-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lang LIU , Jingquan WANG , Chen XU
Abstract: A display panel and a display device are provided. The display panel includes a base substrate, a plurality of pixel drive circuit units, n first signal lines, a touch layer, and a light emitting element. A distance between first extending portions of two adjacent first signal lines is greater than a distance between first bending portions of the two adjacent first signal lines. An orthogonal projection overlap area between the first connecting portion and first extending portions of the n first signal lines is S1, and an orthogonal projection overlap area between the first connecting portion and first bending portions of the n first signal lines is S2. S1≥S2. A length of a first extending portion of at least one first signal line is L1, a distance between the first extending portion of at least one first signal line and the second electrode is H1, and H1≥(S1/n)/L1.
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公开(公告)号:US20210334307A1
公开(公告)日:2021-10-28
申请号:US16623347
申请日:2019-05-22
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: G06F16/738 , G06F16/787 , G01C21/36 , G06K9/00
Abstract: The present disclosure provides method and systems for generating a preview picture set from a video. The method for generating a preview picture set from the video may include: acquiring a travel route in the video, determining a target location in the travel route, acquiring information of the target location, acquiring an actual picture of the target location, and generating a preview picture set of the video according to the information of the target location and the actual picture. A preview picture set containing video information may be generated to enable a user to conveniently and quickly find the video using the preview picture set, thereby optimizing the user experience.
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公开(公告)号:US20210202603A1
公开(公告)日:2021-07-01
申请号:US16976827
申请日:2019-11-29
Inventor: Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H01L27/32
Abstract: A display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a first transistor, a second transistor, a third transistor, and a storage capacitor. The display substrate further includes an extension portion protruding from the gate electrode of the first transistor, and the extension portion is extended from the gate electrode of the first transistor in the second direction; the extension portion is at least partially overlapped with the first electrode of the second transistor in a direction perpendicular to the base substrate and is electrically connected with the first electrode of the second transistor; in the first direction, the extension portion has a second side closest to the second capacitor electrode, and the second side is recessed in a direction away from the second capacitor electrode.
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公开(公告)号:US20240298461A1
公开(公告)日:2024-09-05
申请号:US18663458
申请日:2024-05-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xinwei GAO , Kaihong MA , Dacheng ZHANG , Lang LIU , Chen XU
IPC: H10K50/844 , H10K50/842 , H10K59/12 , H10K59/131 , H10K71/00
CPC classification number: H10K50/844 , H10K50/8426 , H10K59/131 , H10K71/00 , H10K59/1201
Abstract: A display panel and a manufacture method thereof, and a display apparatus are provided. The display panel has a display region and a border region that surrounds the display region and includes a peripheral circuit region and a peripheral region; the peripheral circuit region is between the display region and the peripheral region. At least a part of a barrier structure of the display panel is in the peripheral circuit region, and the barrier structure includes an organic barrier layer including an opening passing through the organic barrier layer and an inorganic barrier layer covering the organic barrier layer and filling the opening; an extension direction of the opening is same as that of an edge, close to the opening, of the display panel; the peripheral circuit is in the peripheral circuit region.
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公开(公告)号:US20240257733A1
公开(公告)日:2024-08-01
申请号:US18014766
申请日:2021-07-30
Inventor: Yao HUANG , Benlian WANG , Ming HU , Lang LIU , Kai ZHANG , Weiyun HUANG
IPC: G09G3/3233 , H10K59/121
CPC classification number: G09G3/3233 , H10K59/1213 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08 , G09G2320/0247 , G09G2320/0257 , G09G2330/021
Abstract: A pixel driving circuit includes: a driving transistor, a data write circuit, a threshold compensation circuit, a first capacitor, and a second capacitor. A gate of the driving transistor is coupled to a first node, a first electrode is coupled to a second node, and a second electrode is coupled to a third node. The data write circuit is configured to transmit a signal of a data signal terminal to the second node in response to a signal of a first gate driving signal terminal. The threshold compensation circuit is configured to communicate the first node with the third node in response to a signal of a second gate driving signal terminal. The first capacitor is coupled between the first node and the first gate driving signal terminal. The second capacitor is coupled between the first node and the second gate driving signal terminal.
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公开(公告)号:US20240057418A1
公开(公告)日:2024-02-15
申请号:US18492194
申请日:2023-10-23
Inventor: Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
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公开(公告)号:US20230157110A1
公开(公告)日:2023-05-18
申请号:US16976796
申请日:2019-11-29
Inventor: Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
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公开(公告)号:US20220399523A1
公开(公告)日:2022-12-15
申请号:US16977285
申请日:2019-10-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xinwei GAO , Kaihong MA , Dacheng ZHANG , Lang LIU , Chen XU
Abstract: A display panel and a manufacture method thereof, and a display apparatus are provided. The display panel has a display region and a border region that surrounds the display region and includes a peripheral circuit region and a peripheral region; the peripheral circuit region is between the display region and the peripheral region. At least a part of a barrier structure of the display panel is in the peripheral circuit region, and the barrier structure includes an organic barrier layer including an opening passing through the organic barrier layer and an inorganic barrier layer covering the organic barrier layer and filling the opening; an extension direction of the opening is same as that of an edge, close to the opening, of the display panel the peripheral circuit is in the peripheral circuit region.
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公开(公告)号:US20220359623A1
公开(公告)日:2022-11-10
申请号:US17869079
申请日:2022-07-20
Inventor: Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H01L27/32
Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a first transistor, a second transistor and a storage capacitor. The display substrate further includes an extension portion protruding from the gate electrode of the first transistor, and the extension portion is extended from the gate electrode of the first transistor in the second direction; the extension portion is at least partially overlapped with the first electrode of the second transistor in a direction perpendicular to the base substrate and is electrically connected with the first electrode of the second transistor; in the first direction, the extension portion has a second side closest to the second capacitor electrode, and the second side is recessed in a direction away from the second capacitor electrode.
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公开(公告)号:US20210202679A1
公开(公告)日:2021-07-01
申请号:US16977928
申请日:2019-11-29
Inventor: Meng LI , Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Xuehuan FENG , Lang LIU , Dacheng ZHANG
IPC: H01L27/32 , H01L51/52 , H01L51/56 , G09G3/3233
Abstract: A display substrate and a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array. At least one sub-pixel includes a first transistor, a second transistor, a third transistor and a storage capacitor. The first electrode of the third transistor is electrically connected to an active layer of the third transistor through a first via hole, and the first electrode of the third transistor is configured to be electrically connected to the light emitting element through a second via hole; the first via hole and the second via hole are at least partially overlapped with each other in a direction perpendicular to the base substrate.
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