PRESSURE PORT FOR ULTRASONIC TRANSDUCER ON CMOS SENSOR

    公开(公告)号:US20250090138A1

    公开(公告)日:2025-03-20

    申请号:US18793062

    申请日:2024-08-02

    Abstract: Micromachined ultrasonic transducers having pressure ports are described. The micromachined ultrasonic transducers may comprise flexible membranes configured to vibrate over a cavity. The cavity may be sealed, in some instances by the membrane itself. A pressure port may provide access to the cavity, and thus control of the cavity pressure. In some embodiments, an ultrasound device including an array of micromachined ultrasonic transducers is provided, with pressure ports for at least some of the ultrasonic transducers. The pressure ports may be used to control pressure across the array.

    Adaptive cavity thickness control for micromachined ultrasonic transducer devices

    公开(公告)号:US11583894B2

    公开(公告)日:2023-02-21

    申请号:US16683750

    申请日:2019-11-14

    Abstract: A method of forming an ultrasonic transducer device includes forming and patterning a film stack over a substrate, the film stack comprising a metal electrode layer and a chemical mechanical polishing (CMP) stop layer formed over the metal electrode layer; forming an insulation layer over the patterned film stack; planarizing the insulation layer to the CMP stop layer; measuring a remaining thickness of the CMP stop layer; and forming a membrane support layer over the patterned film stack, wherein the membrane support layer is formed at thickness dependent upon the measured remaining thickness of the CMP stop layer, such that a combined thickness of the CMP stop layer and the membrane support layer corresponds to a desired transducer cavity depth.

    Methods and apparatuses for turning on and off an ADC driver in an ultrasound device

    公开(公告)号:US11558062B2

    公开(公告)日:2023-01-17

    申请号:US16937553

    申请日:2020-07-23

    Abstract: Aspects of the technology described herein relate to control circuitry configured to turn on and off the ADC driver. In some embodiments, the control circuitry is configured to turn on and off the ADC driver in synchronization with sampling activity of an ADC, in particular based on when an ADC is sampling. The control circuitry may be configured to turn on the ADC driver during the hold phase of the ADC a time period before the track phase and to turn off the ADC driver during the hold phase a time period after the track phase. In some embodiments, the control circuitry is configured to control a duty cycle of the ADC driver turning on and off. In some embodiments, the control circuitry is configured to control a ratio between an off current and an on current in the ADC driver.

    METHODS AND APPARATUSES FOR PACKAGING AN ULTRASOUND-ON-A-CHIP

    公开(公告)号:US20220395254A1

    公开(公告)日:2022-12-15

    申请号:US17853835

    申请日:2022-06-29

    Abstract: Aspects of the disclosure described herein related to packaging an ultrasound-on-a-chip. In some embodiments, an apparatus includes an ultrasound-on-a-chip that has through-silicon vias (TSVs) and an interposer coupled to the ultrasound-on-a-chip and including vias, where the ultrasound-on-a-chip is coupled to the interposer such that the TSVs in the ultrasound-on-a-chip are electrically connected to the vias in the interposer. In some embodiments, an apparatus includes an ultrasound-on-a-chip having bond pads, an interposer that has bond pads and that is coupled to the ultrasound-on-a-chip, and wirebonds extending from the bond pads on the ultrasound-on-a-chip to the bond pads on the interposer.

    ULTRASOUND APPARATUSES AND METHODS FOR FABRICATING ULTRASOUND DEVICES

    公开(公告)号:US20220313219A1

    公开(公告)日:2022-10-06

    申请号:US17845940

    申请日:2022-06-21

    Abstract: Aspects of the technology described herein relate to an ultrasound device including a first die that includes an ultrasonic transducer, a first application-specific integrated circuit (ASIC) that is bonded to the first die and includes a pulser, and a second ASIC in communication with the second ASIC that includes integrated digital receive circuitry. In some embodiments, the first ASIC may be bonded to the second ASIC and the second ASIC may include analog processing circuitry and an analog-to-digital converter. In such embodiments, the second ASIC may include a through-silicon via (TSV) facilitating communication between the first ASIC and the second ASIC. In some embodiments, SERDES circuitry facilitates communication between the first ASIC and the second ASIC and the first ASIC includes analog processing circuitry and an analog-to-digital converter. In some embodiments, the technology node of the first ASIC is different from the technology node of the second ASIC.

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