公开(公告)号：US08723772B2

公开(公告)日：2014-05-13

申请号：US13204941

申请日：2011-08-08

申请人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

发明人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Chih-Ying Lin ,  Kun-Yueh Lin

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0205

摘要： A LCD panel with an improved pixel array configuration is provided. The LCD panel uses a column inversion driving method to drive the data lines so as to achieve a stable common voltage. Moreover, by cross-connecting the layout traces of the wiring zone in a specified manner, the gate pulses outputted from every two gate lines neighboring the sub-pixel are not overlapped with each other, so that the frame can be normally displayed.

摘要翻译： 提供了具有改进的像素阵列配置的LCD面板。 LCD面板使用列反转驱动方法驱动数据线，以达到稳定的公共电压。 此外，通过以指定的方式交叉连接布线区的布局迹线，从与子像素相邻的每两个栅极线输出的栅极脉冲彼此不重叠，从而可以正常显示该帧。

公开(公告)号：US08581890B2

公开(公告)日：2013-11-12

申请号：US12684905

申请日：2010-01-09

申请人： Yung-Chih Chen ,  Tsung-Ting Tsai ,  Kuo-Chang Su ,  Chun-Hsin Liu

发明人： Yung-Chih Chen ,  Tsung-Ting Tsai ,  Kuo-Chang Su ,  Chun-Hsin Liu

IPC分类号： G06F3/038

CPC分类号： G09G3/3677 ,  G09G2310/0251 ,  G09G2320/0219

摘要： In a liquid crystal display, a flat display and a gate driving method thereof, the flat display comprises first and second pixel rows, first to third gate lines and a gate driving circuit. The first gate line is for determining whether to turn on a portion of pixels in the first pixel row, the second gate line is for determining whether to turn on another portion of pixels in the first pixel row, and the third gate line is for determining whether to turn on a portion of the pixels in the second pixel row. The gate driving circuit is for providing first to third gate driving pulses to the first to third gate lines. The first and second gate driving pulses do not overlap with each other, and the third gate driving pulse partially overlaps with one of the first and second gate driving pulses.

摘要翻译： 在液晶显示器，平板显示器及其栅极驱动方法中，平面显示器包括第一和第二像素行，第一至第三栅极线和栅极驱动电路。 第一栅极线用于确定是否接通第一像素行中的一部分像素，第二栅极线用于确定是否接通第一像素行中的另一部分像素，并且第三栅极线用于确定 是否打开第二像素行中的像素的一部分。 栅极驱动电路用于向第一至第三栅极线提供第一至第三栅极驱动脉冲。 第一和第二栅极驱动脉冲彼此不重叠，并且第三栅极驱动脉冲与第一和第二栅极驱动脉冲中的一个部分重叠。

公开(公告)号：US08421781B2

公开(公告)日：2013-04-16

申请号：US12636801

申请日：2009-12-14

申请人： Yung-Chih Chen ,  Chun-Hsin Liu ,  Tsung-Ting Tsai ,  Kuo-Chang Su

发明人： Yung-Chih Chen ,  Chun-Hsin Liu ,  Tsung-Ting Tsai ,  Kuo-Chang Su

IPC分类号： G06F3/038

CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G09G2320/0209

摘要： A shift register has a plurality of shift register units coupled in series. Each shift register includes a pull-up circuit, an input circuit, a pull-down circuit, a compensation circuit, an input end, an output end and a node. Each shift register unit receives an input voltage at the input end and provides an output voltage at the output end. The input circuit transmits the input voltage to the node based on a first clock signal. The pull-up circuit provides the output voltage based on a second clock signal and the voltage level of the node. The pull-down circuit selectively connects the node with the output end according to a third clock signal. The compensation circuit is coupled to the input circuit, the pull-down circuit and the node for maintaining the voltage level of the node based on the second and third clock signals.

摘要翻译： 移位寄存器具有串联耦合的多个移位寄存器单元。 每个移位寄存器包括上拉电路，输入电路，下拉电路，补偿电路，输入端，输出端和节点。 每个移位寄存器单元在输入端接收输入电压，并在输出端提供输出电压。 输入电路基于第一时钟信号将输入电压发送到节点。 上拉电路基于第二时钟信号和节点的电压电平提供输出电压。 下拉电路根据第三时钟信号选择性地将节点与输出端连接。 补偿电路耦合到输入电路，下拉电路和节点，用于基于第二和第三时钟信号来维持节点的电压电平。

公开(公告)号：US08233584B2

公开(公告)日：2012-07-31

申请号：US13372796

申请日：2012-02-14

申请人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Chun-Hsin Liu

发明人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Chun-Hsin Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2310/0286 ,  G11C19/184

摘要： An exemplary shift register includes a control circuit and an output transistor. The control circuit has a start pulse signal input terminal, a first clock pulse signal input terminal and a power supply voltage input terminal and includes a first control transistor and a second control transistor. The output transistor is electrically coupled to the first control transistor and includes a gate driving signal output terminal and a second clock pulse signal input terminal. Moreover, the first control transistor, the second control transistor and the output transistor all are negative threshold voltage transistors.

摘要翻译： 示例性移位寄存器包括控制电路和输出晶体管。 控制电路具有起始脉冲信号输入端，第一时钟脉冲信号输入端和电源电压输入端，并具有第一控制晶体管和第二控制晶体管。 输出晶体管电耦合到第一控制晶体管，并且包括栅极驱动信号输出端和第二时钟脉冲信号输入端。 此外，第一控制晶体管，第二控制晶体管和输出晶体管都是负阈值电压晶体管。

公开(公告)号：US20120176340A1

公开(公告)日：2012-07-12

申请号：US13281439

申请日：2011-10-26

申请人： Chien-Sheng Yang ,  Li-Huang Lu ,  Yung-Chih Chen

发明人： Chien-Sheng Yang ,  Li-Huang Lu ,  Yung-Chih Chen

IPC分类号： G06F3/042

CPC分类号： G06F3/042 ,  G06F3/0428

摘要： A touch module including an image sensing unit, a plurality of first reflecting elements, a plurality of second reflecting elements, and a processing unit is provided. The image sensing unit is positioned in correspondence with a first corner of a sensing area and capable of capturing a sensing image to output an image signal. The first reflecting elements and the second reflecting elements respectively have different first angles and different second angles, are disposed along a first and the second edges of the sensing area respectively, and are capable of reflecting a touch object to form a first and a second image in the sensing image. A second corner formed by the first the second edges is diagonal to the first corner. The processing unit is coupled the image sensing unit and receives the image signal to determine the position of the touch object relative to the sensing area.

摘要翻译： 提供了包括图像感测单元，多个第一反射元件，多个第二反射元件和处理单元的触摸模块。 图像感测单元被定位成与感测区域的第一角对应并且能够捕获感测图像以输出图像信号。 第一反射元件和第二反射元件分别具有不同的第一角度和不同的第二角度，分别沿感测区域的第一和第二边缘设置，并且能够反射触摸对象以形成第一和第二图像 在感应图像中。 由第一个第二边缘形成的第二个角与第一个角对角。 处理单元耦合图像感测单元并接收图像信号以确定触摸对象相对于感测区域的位置。

公开(公告)号：US20120169581A1

公开(公告)日：2012-07-05

申请号：US13270333

申请日：2011-10-11

申请人： Kuo-Chang SU ,  Yung-Chih Chen ,  Kuo-Hua Hsu

发明人： Kuo-Chang SU ,  Yung-Chih Chen ,  Kuo-Hua Hsu

IPC分类号： G09G3/36 ,  G11C19/00

CPC分类号： G11C19/28 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/285

摘要： A shift register includes a signal input unit for receiving and providing an input signal, a signal output unit for controlling whether outputting a clock signal according to the input signal provided by the signal input unit, and a plurality of stable modules. Each of the stable modules is electrically coupled to an output terminal of the signal input unit, an output terminal of the signal output unit, and a default potential. Each of the stable modules receives a corresponding operation signal and is enabled in a duty of the corresponding operation signal, such that both the output terminal of the signal input unit and the output terminal of the signal output unit are electrically coupled to the default potential when the input signal is disabled. Before one of the stable modules is disabled, another of the stable modules has already been enabled.

摘要翻译： 移位寄存器包括用于接收和提供输入信号的信号输入单元，用于根据由信号输入单元提供的输入信号来控制是否输出时钟信号的信号输出单元和多个稳定模块。 每个稳定模块电耦合到信号输入单元的输出端，信号输出单元的输出端和默认电位。 每个稳定模块接收对应的操作信号，并且在对应的操作信号的占空比中使能，使得信号输入单元的输出端和信号输出单元的输出端都电耦合到默认电位， 输入信号被禁止。 在禁用其中一个稳定模块之前，已经启用了另一个稳定模块。

公开(公告)号：US20120155604A1

公开(公告)日：2012-06-21

申请号：US13206518

申请日：2011-08-10

申请人： Yu-Chung Yang ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Kuo-Chang Su

发明人： Yu-Chung Yang ,  Yung-Chih Chen ,  Kuo-Hua Hsu ,  Kuo-Chang Su

IPC分类号： G11C19/28 ,  G11C19/00

CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G11C19/287

摘要： A shift register circuit includes plural shift register stages for providing plural gate signals. The Nth shift register stage of the shift register stages includes an input unit, a pull-up unit and a pull-down unit. The input unit is put in use for outputting an Nth driving control voltage according to an (N−1)th gate signal and an (N−2)th driving control voltage which are generated respectively by the (N−1) th shift register stage and the (N−2) th shift register stage of the shift register stages. The pull-up unit pulls up an Nth gate signal according to the Nth driving control voltage and a system clock. The pull-down unit pulls down the Nth gate signal and the Nth driving control voltage according to an (N+2)th gate signal generated by the (N+2)th shift register stage of the shift register stages.

摘要翻译： 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 移位寄存器级的第N个移位寄存器级包括一个输入单元，一个上拉单元和一个下拉单元。 输入单元被用于根据第（N-1）个第（N-1）个移位寄存器产生的第（N-1）门信号和第（N-2）个驱动控制电压来输出第N驱动控制电压 级和移位寄存器级的（N-2）移位寄存器级。 上拉单元根据第N个驱动控制电压和系统时钟提取第N个门信号。 下拉单元根据由移位寄存器级的第（N + 2）个移位寄存器级产生的第（N + 2）门信号来拉下第N栅极信号和第N驱动控制电压。

公开(公告)号：US08160198B2

公开(公告)日：2012-04-17

申请号：US13208358

申请日：2011-08-12

申请人： Tsung-Ting Tsai ,  Yung-Chih Chen

发明人： Tsung-Ting Tsai ,  Yung-Chih Chen

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286

摘要： A shift register circuit includes a plurality of shift register stages for providing plural gate signals to plural gate lines. Each shift register stage includes an input unit, a first pull-up unit, a second pull-up unit, a pull-down unit and an auxiliary pull-down unit. The input unit inputs a first gate signal generated by a preceding shift register stage to become a driving control voltage. The first pull-up unit pulls up a second gate signal according to the driving control voltage and a first clock signal. The second pull-up unit pulls up a third gate signal according to the driving control voltage and a second clock signal. The auxiliary pull-down unit is employed to pull down the driving control voltage according to a fourth gate signal generated by a subsequent shift register stage. The pull-down unit pulls down the first and second gate signals according to the driving control voltage.

摘要翻译： 移位寄存器电路包括用于向多个栅极线提供多个栅极信号的多个移位寄存器级。 每个移位寄存器级包括输入单元，第一上拉单元，第二上拉单元，下拉单元和辅助下拉单元。 输入单元输入由前一移位寄存器级产生的第一门信号，以成为驱动控制电压。 第一上拉单元根据驱动控制电压和第一时钟信号上拉第二栅极信号。 第二上拉单元根据驱动控制电压和第二时钟信号上拉第三栅极信号。 辅助下拉单元用于根据随后的移位寄存器级产生的第四栅极信号来下拉驱动控制电压。 下拉单元根据驱动控制电压拉低第一和第二栅极信号。

公开(公告)号：US20120001865A1

公开(公告)日：2012-01-05

申请号：US13047789

申请日：2011-03-14

申请人： Yung-Chih Chen ,  Chun-Hsin Liu

发明人： Yung-Chih Chen ,  Chun-Hsin Liu

IPC分类号： G06F3/045

CPC分类号： G06F3/0412 ,  G06F3/044

摘要： A liquid crystal display having touch input sensing includes a display panel and sensing units integrated in the display panel. The display panel has scan lines for delivering scan signals and readout lines for delivering readout signals. The sensing unit resets a sensing voltage according to a low-level voltage of the scan signal. Further, the sensing unit pulls up the sensing voltage according to a high-level voltage of the scan signal and an increase of the sensing voltage is under the control of a touch event. The readout signal is generated by the sensing unit based on the sensing voltage and the high-level voltage of the scan signal.

摘要翻译： 具有触摸输入感测的液晶显示器包括显示面板和集成在显示面板中的感测单元。 显示面板具有用于传送扫描信号的扫描线和用于传送读出信号的读出线。 感测单元根据扫描信号的低电平电压复位感测电压。 此外，感测单元根据扫描信号的高电平提升感测电压，并且感测电压的增加在触摸事件的控制之下。 读出信号由感测单元基于感测电压和扫描信号的高电平电压产生。

公开(公告)号：US20110293063A1

公开(公告)日：2011-12-01

申请号：US13208358

申请日：2011-08-12

申请人： Tsung-Ting Tsai ,  Yung-Chih Chen

发明人： Tsung-Ting Tsai ,  Yung-Chih Chen

IPC分类号： G11C19/28

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286

摘要： A shift register circuit includes a plurality of shift register stages for providing plural gate signals to plural gate lines. Each shift register stage includes an input unit, a first pull-up unit, a second pull-up unit, a pull-down unit and an auxiliary pull-down unit. The input unit inputs a first gate signal generated by a preceding shift register stage to become a driving control voltage. The first pull-up unit pulls up a second gate signal according to the driving control voltage and a first clock signal. The second pull-up unit pulls up a third gate signal according to the driving control voltage and a second clock signal. The auxiliary pull-down unit is employed to pull down the driving control voltage according to a fourth gate signal generated by a subsequent shift register stage. The pull-down unit pulls down the first and second gate signals according to the driving control voltage.

摘要翻译： 移位寄存器电路包括用于向多个栅极线提供多个栅极信号的多个移位寄存器级。 每个移位寄存器级包括输入单元，第一上拉单元，第二上拉单元，下拉单元和辅助下拉单元。 输入单元输入由前一移位寄存器级产生的第一门信号，以成为驱动控制电压。 第一上拉单元根据驱动控制电压和第一时钟信号上拉第二栅极信号。 第二上拉单元根据驱动控制电压和第二时钟信号上拉第三栅极信号。 辅助下拉单元用于根据随后的移位寄存器级产生的第四栅极信号来下拉驱动控制电压。 下拉单元根据驱动控制电压拉低第一和第二栅极信号。