Abstract:
A circuit for performing an on-die termination operation includes a clock buffer for outputting first and second buffered clocks using an external clock and an external inverting clock applied thereto externally; an on-die termination buffer for comparing each other an ODT signal and a reference voltage, which are applied thereto from an external chip set, to generate an on-die termination comparison signal; a first flip-flop member for transferring the on-die termination comparison signal as a plurality of parallel output signals based on the first and second buffered clocks outputted from the clock buffer; and a plurality of second flip-flop members, which corresponds to each of the parallel output signals outputted from the first flip-flop member, for transferring the parallel output signals outputted from the first flip-flop member based on delayed lock loop clocks outputted from a delayed lock loop.
Abstract:
A predictive coding in a video coding system, which can enhance the coding efficiency by predictively coding DC coefficients of a block to be coded using DC gradients of a plurality of previously coded neighboring blocks. The predictive coefficient is selected according to the difference between the quantized DC gradients (coefficients) of a plurality of neighboring blocks of the block to be coded, and the DC coefficient of the block to be coded is predictively coded by the selected predictive coefficient, thereby enhancing the coding efficiency.