公开(公告)号：US06175145B1

公开(公告)日：2001-01-16

申请号：US09163826

申请日：1998-09-30

Applicant: Dong-Hun Lee ,  Jong-Hyon Ahn

Inventor： Dong-Hun Lee ,  Jong-Hyon Ahn

IPC: H01L2900

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention provides a fuse of a semiconductor device and a method of forming a fuse of a semiconductor device. The method of the invention includes forming an underlying metal conductor on a semiconductor substrate, forming an insulating film over the underlying metal conductor, and selectively etching regions of the insulating film. One of the regions of the insulating film is etched to form a via contact region exposing the underlying metal conductor. A second region is etched to form a groove in the insulating film for the fuse metal. Metal is buried within the second etched region of the insulating film and the via contact region to respectively form a fuse metal pattern and a via contact metal layer. The fuse metal pattern can be formed from copper and/or tungsten.

Abstract translation: 本发明提供一种半导体器件的熔丝和形成半导体器件的熔丝的方法。 本发明的方法包括在半导体衬底上形成下面的金属导体，在下面的金属导体上形成绝缘膜，并选择性地蚀刻绝缘膜的区域。 蚀刻绝缘膜的一个区域以形成暴露下面的金属导体的通孔接触区域。 蚀刻第二区域以在用于熔丝金属的绝缘膜中形成凹槽。 金属被埋在绝缘膜和通孔接触区域的第二蚀刻区域内，以分别形成熔丝金属图案和通孔接触金属层。 熔丝金属图案可以由铜和/或钨形成。

公开(公告)号：US6074940A

公开(公告)日：2000-06-13

申请号：US122501

申请日：1998-07-24

Applicant: Dong-Hun Lee ,  Jong-Hyon Ahn

Inventor： Dong-Hun Lee ,  Jong-Hyon Ahn

IPC: H01L21/82 ,  H01L23/525 ,  H01L21/44

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  Y10S148/055

Abstract: The present invention provides a fuse of a semiconductor device and a method of forming a fuse of a semiconductor device. The method of the invention includes forming an underlying metal conductor on a semiconductor substrate, forming an insulating film over the underlying metal conductor, and selectively etching regions of the insulating film. One of the regions of the insulating film is etched to form a via contact region exposing the underlying metal conductor. A second region is etched to form a groove in the insulating film for the fuse metal. Metal is buried within the second etched region of the insulating film and the via contact region to respectively form a fuse metal pattern and a via contact metal layer.

Abstract translation: 本发明提供一种半导体器件的熔丝和形成半导体器件的熔丝的方法。 本发明的方法包括在半导体衬底上形成下面的金属导体，在下面的金属导体上形成绝缘膜，并选择性地蚀刻绝缘膜的区域。 蚀刻绝缘膜的一个区域以形成暴露下面的金属导体的通孔接触区域。 蚀刻第二区域以在用于熔丝金属的绝缘膜中形成凹槽。 金属被埋在绝缘膜和通孔接触区域的第二蚀刻区域内，以分别形成熔丝金属图案和通孔接触金属层。