公开(公告)号：USRE37477E1

公开(公告)日：2001-12-18

申请号：US08532011

申请日：1995-09-21

Applicant: Francois Tailliet ,  Jacek Kowalski

Inventor： Francois Tailliet ,  Jacek Kowalski

IPC: H02H904

CPC classification number: H01L27/0251

Abstract: To protect integrated circuits as efficiently as possible against electrostatic discharges, by putting a diode in avalanche mode without untimely triggering of this avalance mode by overvoltages of non-electrostatic origin, the following solution is proposed: through an insulated gate surrounding the cathode of the diode, the threshold for transition into avalanche mode of the diode is modified according to the slope of the overvoltages appearing at the terminal to be protected. The gate is connected to the terminal by an integrating circuit in such a way that the overvoltages are applied to the gate with a certain delay, inducing a potential difference between the cathode and the gate which is all the greater as the front of the overvoltage is steep. The avalanche triggering threshold is higher in the latter case than in the former one, and it is thus distinguish between overvoltages of diverse origins.

Abstract translation: 为了尽可能高效地保护集成电路免受静电放电，通过将二极管置于雪崩模式，而不会因非静电原点的过电压而不及时地触发此平衡模式，提出了以下解决方案：通过围绕二极管阴极的绝缘栅极 根据出现在要保护的端子处的过电压的斜率来修改二极管转变为雪崩模式的阈值。 栅极通过积分电路连接到端子，使得过电压以一定的延迟施加到栅极，引起阴极和栅极之间的电位差，其中过电压的前面是大的 陡。 在后一种情况下，雪崩触发阈值高于前者，因此区分不同来源的过电压。

公开(公告)号：US06266222B1

公开(公告)日：2001-07-24

申请号：US09223621

申请日：1998-12-30

Applicant: Paolo Colombo ,  Jacopo Mulatti ,  Roberto Annunziata ,  Giovanni Campardo ,  Marco Maccarrone

Inventor： Paolo Colombo ,  Jacopo Mulatti ,  Roberto Annunziata ,  Giovanni Campardo ,  Marco Maccarrone

IPC: H02H904

CPC classification number: H01L27/0259 ,  H01L27/0251

Abstract: An ESD protection network protects a CMOS circuit structure integrated in a semiconductor substrate. The circuit structure includes discrete circuit blocks formed in respective substrate portions which are electrically isolated from one another and independently powered from at least one primary voltage supply having a respective primary ground, and from at least one secondary voltage supply having a respective secondary ground. This network includes a first ESD protection element for an input stage of the circuit structure; a second ESD protection element for an output stage of the circuit structure, the first and second protection elements having an input/output pad of the integrated circuit structure in common; a first ESD protection element between the primary supply and the primary ground; and a second ESD protection element between the secondary supply and the secondary ground.

Abstract translation: ESD保护网络保护集成在半导体衬底中的CMOS电路结构。 电路结构包括形成在相应的衬底部分中的分立电路块，它们彼此电绝缘并且由至少一个具有各自的初级接地的初级电压源以及至少一个具有相应次级接地的次级电压源独立供电。 该网络包括用于电路结构的输入级的第一ESD保护元件; 用于所述电路结构的输出级的第二ESD保护元件，所述第一和第二保护元件具有所述集成电路结构的输入/输出焊盘; 主要供电和主地面之间的第一个ESD保护元件; 以及在次级电源和次级接地之间的第二ESD保护元件。

公开(公告)号：US06768617B2

公开(公告)日：2004-07-27

申请号：US10112774

申请日：2002-04-02

Applicant: Kenneth W. Marr

Inventor： Kenneth W. Marr

IPC: H02H904

CPC classification number: H02H9/046 ,  H02H3/006

Abstract: An adjustable setpoint ESD core clamp for ESD protection circuits is disclosed. The core clamp includes an SCR whose P+N trigger junction is referenced to a diode stack. The SCR is non-avalanche triggered into a low impedance state at a set value of Vcc, as determined by the diode stack, which allows the ESD device to turn on at a lower voltage, thereby protecting internal circuitry.

Abstract translation: 公开了用于ESD保护电路的可调节设定值ESD芯夹。 芯夹具包括一个SCR，其P + N触发结参考二极管堆叠。 SCR被非雪崩触发为低阻抗状态，其设定值Vcc由二极管堆叠确定，这允许ESD器件在较低电压下导通，从而保护内部电路。

公开(公告)号：US06747861B2

公开(公告)日：2004-06-08

申请号：US09987616

申请日：2001-11-15

Applicant: Ming-Dou Ker ,  Chien-Hui Chung ,  Hsin-Chin Jiang

Inventor： Ming-Dou Ker ,  Chien-Hui Chung ,  Hsin-Chin Jiang

IPC: H02H904

CPC classification number: H01L27/0262

Abstract: An electrostatic discharge protection circuit that includes a rectifier, having an anode and a cathode, including a first p-type portion, a first n-type portion contiguous with the first p-type portion, a second p-type portion contiguous with the first n-type portion, and a second n-type portion contiguous with the second p-type portion, wherein the first p-type portion is coupled to the anode and the second n-type portion is coupled to the cathode, a first transistor having a first terminal, a second terminal and a gate terminal, wherein the first terminal is coupled to the first n-type portion of the rectifier, a second transistor having a first terminal, a second terminal and a gate terminal, wherein the first terminal is coupled to the second terminal of the first transistor, and the second terminal is coupled to the second n-type portion of the rectifier, and a voltage coupling circuit having a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein the first terminal is coupled to the anode of the rectifier, the second and the third terminals are respectively coupled to the gate terminals of the first and second transistors, and the fourth terminal is coupled to the cathode.

Abstract translation: 一种静电放电保护电路，包括具有阳极和阴极的整流器，包括第一p型部分，与第一p型部分相邻的第一n型部分，与第一p型部分邻接的第二p型部分 n型部分和与第二p型部分邻接的第二n型部分，其中第一p型部分耦合到阳极，第二n型部分耦合到阴极，第一晶体管具有 第一端子，第二端子和栅极端子，其中第一端子耦合到整流器的第一n型部分，具有第一端子，第二端子和栅极端子的第二晶体管，其中第一端子是 耦合到第一晶体管的第二端子，并且第二端子耦合到整流器的第二n型部分，以及具有第一端子，第二端子，第三端子和第四端子的电压耦合电路， 其中 第一端子耦合到整流器的阳极，第二和第三端子分别耦合到第一和第二晶体管的栅极端子，并且第四端子耦合到阴极。

公开(公告)号：US06704180B2

公开(公告)日：2004-03-09

申请号：US10132756

申请日：2002-04-25

Applicant: Larry E. Tyler ,  James T. May

Inventor： Larry E. Tyler ,  James T. May

IPC: H02H904

CPC classification number: H01L27/0255 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An ESD protection circuit protects circuitry internal to an integrated circuit from ESD damage to electrostatic discharge voltages occurring at one or more of the inputs of the integrated circuit while maintaining substantially zero effective capacitance at the inputs. The ESD protection circuit includes a pair of diodes of opposite conductivity coupled between at least one of the inputs of the integrated circuit and an internal node thereof for providing current paths to the operating supply rails when ESD voltages occurring at the input forward bias the diodes. A unity gain amplifier provides feedback between the input and the internal circuit node to maintain a zero voltage difference therebetween whereby the effective capacitance seen at the input is reduced to substantially zero.

Abstract translation: ESD保护电路保护集成电路内部的电路免受ESD损坏，从而在集成电路的一个或多个输入处产生静电放电电压，同时在输入端保持基本为零的有效电容。 ESD保护电路包括耦合在集成电路的至少一个输入端和其内部节点之间的相反导电性的一对二极管，用于在输入端发生的ESD电压正向偏置二极管时提供到工作电源轨的电流路径。 单位增益放大器在输入和内部电路节点之间提供反馈以在其间保持零电压差，由此在输入处看到的有效电容被减小到基本为零。

公开(公告)号：US06621673B2

公开(公告)日：2003-09-16

申请号：US09903693

申请日：2001-07-13

Applicant: Geeng-Lih Lin ,  Ming-Dou Ker

Inventor： Geeng-Lih Lin ,  Ming-Dou Ker

IPC: H02H904

CPC classification number: H01L27/0266

Abstract: A two-stage ESD protection circuit coupled between an I/O pad and a power rail is provided in the present invention. The two-stage ESD protection circuit has a primary ESD protection circuit and a secondary ESD circuit. The trigger-on rate of the secondary ESD protection circuit is sped up by employing an ESD detection circuit coupled to the I/O pad. It can be further sped up by employing a native NMOS in the secondary ESD protection. According to the invention, the trigger-on speed of the secondary ESD protection circuit can be effectively improved to obtain better ESD protection for the thinner gate oxides of internal circuits in sub-quarter-micron CMOS process.

公开(公告)号：US06606232B1

公开(公告)日：2003-08-12

申请号：US10109214

申请日：2002-03-28

Applicant: Chanh C. Vo ,  Brad N. Grunwald

Inventor： Chanh C. Vo ,  Brad N. Grunwald

IPC: H02H904

CPC classification number: H01T1/14 ,  H01C7/126

Abstract: A failsafe surge protector having a reduced part count includes a line terminal, a gas tube assembly, at least one ground spring for biasing the gas tube assembly in the direction of the line terminal, and a ground terminal. The gas tube assembly includes a gas tube, a fusible solder pellet, a failsafe ground, an MOV, and an MOV spring. The surge protector provides a first electrical ground path from the line terminal to the ground terminal through the gas tube and the fusible solder pellet, and a second electrical ground path parallel to the first electrical ground path from the line terminal to the ground terminal through the MOV. When the fusible solder pellet melts, the ground spring biases the failsafe ground into electrical contact with the line terminal, thereby providing a short-circuit electrical path from the line terminal to the ground terminal through the failsafe ground.

Abstract translation: 具有减少部件数量的故障安全浪涌保护器包括线路端子，气体管组件，用于沿着线路端子的方向偏压气体管组件的至少一个接地弹簧和接地端子。 气体管组件包括气体管，可熔焊料丸，故障保护地，MOV和MOV弹簧。 浪涌保护器提供从线路端子到接地端子通过气体管和可熔焊料颗粒的第一电接地路径，以及平行于从线路终端到接地终端的第一电接地路径的第二电接地路径，通过 MOV。 当可熔焊料丸熔化时，接地弹簧将故障保护地偏压到与线路端子电接触，从而通过故障保护地线提供从线路终端到接地端子的短路电路径。