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公开(公告)号：US20170154594A1
公开(公告)日：2017-06-01
申请号：US14785907
申请日：2015-09-21
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng XIAO , Ronglei DAI , Yao YAN , Shangcao CAO
IPC: G09G3/36
CPC classification number: G09G3/3677 , G02F1/13454 , G09G3/3696 , G09G2300/0408 , G09G2300/0426 , G09G2300/0871 , G09G2310/08
Abstract: A liquid crystal display device and a gate driving circuit are disclosed. The gate driving circuit includes multiple-stage gate driving units and a control chip. Each stage gate driving unit includes a first pulling control unit, a first pulling unit, a second pulling control unit, a second pulling unit, a first reset unit, a second reset unit. The control chip is used for pulling a first clock signal and a first voltage reference signal to a first voltage level. Accordingly, the scanning lines driven by the gate driving circuit are all turned on in order to stably realize an All-Gate-On function.
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公开(公告)号：US20230343270A1
公开(公告)日：2023-10-26
申请号：US17051443
申请日：2020-08-28
Inventor： Dian ZHANG , Ronglei DAI
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0267
Abstract: A MOG circuit and a display panel are provided. The MOG circuit controls the current-stage MOG circuit through the first node signal to block the input of the MUX signal. At the same time, the MOG circuit controls the current-stage MUX circuit through the second node signal such that the voltage level of the scan signal is pulled down to the voltage level of the first low voltage level signal. In this way, all the scan signals could satisfy the turn-off stage while the MUX circuit has a lower loading capability.
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13.发明申请公开(公告)号：US20200234619A1
公开(公告)日：2020-07-23
申请号：US16615961
申请日：2019-04-11
Inventor： Ronglei DAI
IPC: G09G3/00
Abstract: A test circuit for preventing an electrostatic discharge (ESD) device from electricity leakage and a display panel having the same are provided. The test circuit includes a switch module between the ESD device and the display panel to control an electrical connection between the ESD device and the display panel, and prevent the display panel from electricity leakage, so as to reduce power consumption.
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公开(公告)号：US20190130802A1
公开(公告)日：2019-05-02
申请号：US15744421
申请日：2017-11-25
Inventor： Ronglei DAI
CPC classification number: G09G3/006 , G09G3/3648 , G09G2330/12
Abstract: Embodiments of the present application provides an array substrate, testing method and display apparatus. The array substrate comprises a testing circuit, pixel units and data lines connecting to the pixel units. The data lines are used for providing data signals to the pixel units and are arranged to extend along a first direction. The testing circuit comprises a switching unit and testing units. The switching unit comprises a first number of first switching elements parallelly arranged along the first direction, and the testing units are parallelly arranged along a second direction perpendicular to the first direction. By using the present application, performance of substrate testing can be ensured while achieving narrow boarder, and user experiences could be easily improved.
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公开(公告)号：US20170256219A1
公开(公告)日：2017-09-07
申请号：US14895601
申请日：2015-11-06
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng XIAO , Ronglei DAI , Shangcao CAO , Yao YAN
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/20 , G09G3/3648 , G09G2300/0408 , G09G2310/0218 , G09G2310/0267 , G09G2310/0286 , G09G2310/08 , G09G2330/026 , G11C19/28
Abstract: A gate on array (GOA) circuit for used in an LCD includes GOA units connected in cascade. An Nth GOA unit includes an Nth stage-transmittance circuit, an Nth Q-node controlling circuit, an Nth P-node controlling circuit, an Nth outputting circuit, and a first switch circuit where N is a positive integer. The first switch circuit connected to the Nth scanning line, for inputting an enabling signal to the Nth scanning line before the LCD shows images so as to turn on a TFT in a pixel which the Nth scanning line is connected to. The benefit of the function is that the display does not leak electricity when the black screen is woken up and that the stability of the circuit is enhanced at the same time.
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Patent Agency Ranking
公开(公告)号：US20170124975A1
公开(公告)日：2017-05-04
申请号：US15011502
申请日：2016-01-30
Inventor： Juncheng XIAO , Yao YAN , Ronglei DAI , Shangcao CAO
CPC classification number: G09G3/3677 , G06F3/0412 , G06F3/0416 , G09G2300/0408 , G09G2310/0202 , G09G2310/0286
Abstract: The disclosure discloses a GOA circuit and a liquid crystal display apparatus. The GOA circuit includes a number of GOA unit in cascade connection, wherein the Nth level GOA unit includes a common signal point control module, a gate signal point control module, and a GAS signal operation module; wherein the common signal point control module is used to pull up the electrical level of the common signal point after the period of all gate on; a gate signal point control module is used to pull down the electrical level of a gate signal point after the period of all gate on; the GAS signal operation module is used to achieve the all gate on function by a first GAS signal and a second GAS signal to control the output of the Nth level gate driving signal in the touch panel scanning period.
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公开(公告)号：US20240170500A1
公开(公告)日：2024-05-23
申请号：US17602793
申请日：2021-08-10
Inventor： Zuoyuan XU , Ronglei DAI , Qiang GONG
IPC: H01L27/12
CPC classification number: H01L27/1244
Abstract: The present disclosure discloses a display panel and a display device. The display panel comprises a driving chip and fan-out wires. Fan-out wires in a first fan-out wire group are electrically connected to corresponding output terminals through a second side of an adjacent driving chip; each of the fan-out wires in the first fan-out wire group comprises a first fan-out section and a second fan-out section that are connected and located on different layers. The present disclosure adopts a wire-changing jumper design to prevent signal disorder caused by inconsistent orders of the output terminals and the fan-out wires.
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公开(公告)号：US20220301474A1
公开(公告)日：2022-09-22
申请号：US17057676
申请日：2020-09-25
Inventor： Dian ZHANG , Ronglei DAI
IPC: G09G3/20
Abstract: A demultiplexer gate driver circuit and a display panel are provided. The demultiplexer gate driver circuit aims at the problem that the output amplitude of the m sub-gate drive signals divided from the gate drive signal by the demultiplexer module is low, which results in a poorer All Gate On function, when the GOA circuit of the demultiplexer module is used to achieve the All Gate On function. The full-on control module is improved by connecting the full-on control module to the m sub-gate drive signals divided from the gate drive signal. The m sub-gate drive signals are directly controlled by the full-on control module to output the high potential at the same time, and there is only one threshold voltage consumption from the full-on control signal to the sub-gate drive signals. The effect of the All Gate On function is effectively improved.
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公开(公告)号：US20170256224A1
公开(公告)日：2017-09-07
申请号：US14915222
申请日：2016-01-05
Inventor： Juncheng XIAO , Shangcao CAO , Ronglei DAI , Yao YAN
IPC: G09G3/36
CPC classification number: G09G3/3677 , G06F3/0416 , G09G2300/0408 , G09G2310/0251 , G09G2310/0283 , G09G2310/0286 , G09G2310/08
Abstract: A GOA driving circuit, a TFT display panel and a display device are disclosed. The GOA driving circuit includes: an input module configured for outputting first control signals in accordance with the received display scanning signals and the touch scanning signals; an output module configured for outputting the first output control signals in accordance with the first control signals and the first clock signals; a pull-down module configured for outputting pull-down signals in accordance with the first control signals, the second control signals and the low level signals; and a pull-down maintaining module configure for outputting the second output control signals in accordance with the pull-down signals, the high level signals, and the first clock signals. The DC source is adopted to charge/discharge Qn to keep Qn at a reasonable level, and the transfer capability is enhanced. In addition, the forward scanning and the backward scanning may be implemented.
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公开(公告)号：US20170169784A1
公开(公告)日：2017-06-15
申请号：US14889423
申请日：2015-10-21
Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng XIAO , Shangcao CAO , Ronglei DAI , Yao YAN
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0251 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G11C19/28 , H01L27/124
Abstract: A GOA circuit, a display device, and a driving method of GOA circuit are disclosed. A N-th level GOA unit is configured for charging the N-th level horizontal scanning line (G(N)) within a display area of the display device. The N-th level horizontal scanning line (G(N)) connects to GAS. In response to the GAS, the horizontal scanning lines corresponding to all of the GOA units are in a charging state. In this way, the horizontal scanning lines at each level are connected to the GAS, such that when the GAS are valid, the corresponding horizontal scanning line at each level are in the charging state of in an on-state so as to realize the All Gate On function.
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