公开(公告)号：US11182528B2

公开(公告)日：2021-11-23

申请号：US16929503

申请日：2020-07-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Tseng Hsien ,  Chin-Shen Lin ,  Ching-Shun Yang ,  Jui-Feng Kuan

IPC: G06F30/392 ,  H01L21/768 ,  G06F30/367 ,  G06F30/398 ,  G01R31/28

Abstract: The present disclosure relates to a method of performing electromigration sign-off. The method includes determining a change in temperature due to joule heating from an RMS current of a first interconnect. The change in temperature due to joule heating is added to a change in temperature due to device self-heating to determine a first change in real temperature. A first average current limit is determined for the first interconnect using the first change in real temperature. A first average current on the first interconnect is compared to the first average current limit to determine if a first electromigration violation is present on the first interconnect. A second average current is determined for a second interconnect using a second change in real temperature. The second average current is compared to a second average current limit to determine if a second electromigration violation is present on the second interconnect.

公开(公告)号：US20200342156A1

公开(公告)日：2020-10-29

申请号：US16929503

申请日：2020-07-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Tseng Hsien ,  Chin-Shen Lin ,  Ching-Shun Yang ,  Jui-Feng Kuan

IPC: G06F30/392 ,  H01L21/768 ,  G06F30/367 ,  G06F30/398

Abstract: The present disclosure relates to a method of performing electromigration sign-off. The method includes determining a change in temperature due to joule heating from an RMS current of a first interconnect. The change in temperature due to joule heating is added to a change in temperature due to device self-heating to determine a first change in real temperature. A first average current limit is determined for the first interconnect using the first change in real temperature. A first average current on the first interconnect is compared to the first average current limit to determine if a first electromigration violation is present on the first interconnect. A second average current is determined for a second interconnect using a second change in real temperature. The second average current is compared to a second average current limit to determine if a second electromigration violation is present on the second interconnect.

公开(公告)号：US20190325105A1

公开(公告)日：2019-10-24

申请号：US16460063

申请日：2019-07-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Tseng Hsien ,  Chin-Shen Lin ,  Ching-Shun Yang ,  Jui-Feng Kuan

IPC: G06F17/50 ,  H01L21/768

Abstract: The present disclosure, in some embodiments, relates to an electromigration sign-off tool. The tool includes electronic memory configured to store an integrated chip design and an environmental temperature having a same value corresponding to a plurality of interconnect wires within the integrated chip design. An adder is configured to add the environmental temperature to a plurality of real temperatures to determine a plurality of actual temperatures having different values corresponding to different ones of the plurality of interconnect wires. The plurality of real temperatures account for Joule heating on the plurality of interconnect wires. An average current limit calculation element is configured to determine an average current limit at a first one of the plurality of actual temperatures. A comparator is configured to determine an electromigration violation on a first interconnect wire by comparing the average current limit to an average current of the first interconnect wire.

公开(公告)号：US10346576B2

公开(公告)日：2019-07-09

申请号：US16046142

申请日：2018-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Tseng Hsien ,  Chin-Shen Lin ,  Ching-Shun Yang ,  Jui-Feng Kuan

IPC: G06F17/50 ,  H01L21/768 ,  G01R31/28

Abstract: The present disclosure, in some embodiments, relates to a method of performing electromigration sign-off. The method includes determining an environmental temperature having a same value corresponding to a plurality of interconnect wires within a plurality of electrical networks of an integrated chip design. A plurality of actual temperatures having different values corresponding to different ones of the plurality of interconnect wires are determined. The plurality of actual temperatures are respectively determined by adding the environmental temperature to a real temperature that accounts for Joule heating one of the plurality of interconnect wires. An electromigration margin for a first interconnect wire within a first electrical network of the plurality of electrical networks is determined. The electromigration margin is determined at a first one of the plurality of actual temperatures corresponding to the first interconnect wire. The electromigration margin is compared to an electromigration metric.