公开(公告)号：US11436477B2

公开(公告)日：2022-09-06

申请号：US16857740

申请日：2020-04-24

Applicant: Samsung Electronics Co., Ltd ,  Seoul National University R&DB Foundation

Inventor： Yuhwan Ro ,  Byeongho Kim ,  Jaehyun Park ,  Jungho Ahn ,  Minbok Wi ,  Sunjung Lee ,  Eojin Lee ,  Wonkyung Jung ,  Jongwook Chung ,  Jaewan Choi

IPC: G06N3/063 ,  G06N3/08 ,  G06N20/10 ,  G06F17/16 ,  G06F9/38 ,  G06F9/30

Abstract: A processor-implemented data processing method includes: generating compressed data of first matrix data based on information of a distance between valid elements included in the first matrix data; fetching second matrix data based on the compressed data; and generating output matrix data based on the compressed data and the second matrix data.

公开(公告)号：US20210397376A1

公开(公告)日：2021-12-23

申请号：US17098959

申请日：2020-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yuhwan Ro ,  Shinhaeng Kang ,  Seongwook Park ,  Seungwoo Seo

IPC: G06F3/06 ,  G06N3/063 ,  G06F7/523

Abstract: A memory device includes: in-memory operation units to perform in-memory processing of an operation pipelined in multi-pipeline stages; memory banks assigned to the plurality of in-memory operation units such that a set of n memory banks is assigned to each of the in-memory operation units, each memory bank performing an access operation of data requested by each of the plurality of in-memory operation units while the pipelined operation is performed, wherein n is a natural number; and a memory die in which the in-memory operation units, the memory banks, and command pads configured to receive a command signal from an external source are arranged. Each set of the n memory banks includes a first memory bank having a first data transmission distance to the command pads and a second memory bank having a second data transmission distance to the command pads that is larger than the first data transmission distance.