公开(公告)号：US20190205863A1

公开(公告)日：2019-07-04

申请号：US16331395

申请日：2017-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-Kyoung SHIN ,  Choong-Hoon KIM ,  Sung-Jun KIM

IPC: G06Q20/32 ,  G06Q20/34 ,  G06Q20/38 ,  H04W4/02

CPC classification number: G06Q20/3221 ,  G06Q20/30 ,  G06Q20/32 ,  G06Q20/3278 ,  G06Q20/34 ,  G06Q20/38 ,  G06Q20/382 ,  H04W4/00 ,  H04W4/02

Abstract: The present invention relates to an electronic device and, more particularly, to an electronic device and a method for providing a payment service in the electronic device. To this end, the present invention provides an electronic device for providing a payment service, comprising: a display; a storage unit for storing a plurality of security elements; a communication interface for performing communication with a near field communication (NFC) reader; and a processor, wherein the processor may be configured to: parse payment information during installation of a first security element; check whether the first security element collides with a previously stored second security element, on the basis of the parsed payment information; output a pop-up window on the display when the first security element collides with the second security element; and when the first security element is selected through the output pop-up window, configure a user interface and configure a routing table including the first security element and a corresponding protocol.

公开(公告)号：US20140266362A1

公开(公告)日：2014-09-18

申请号：US14207751

申请日：2014-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Cheon-Oh LEE ,  Tae-Pyeong KIM ,  Jung-Myung CHOI ,  Sung-Jun KIM ,  Ho-Bin SONG ,  Han-Kyul LIM

IPC: H03K5/156

CPC classification number: H03K5/1565

Abstract: A digital duty cycle correction circuit includes a duty cycle controller and a digital duty control code generator. The duty cycle controller generates first and second output clock signals by compensating duty cycles of first and second input clock signals based on a digital duty control code. The digital duty control code generator generates the digital duty control code based on a frequency value obtained by converting duty cycle information of the first output clock signal and the second output clock signal.

Abstract translation: 数字占空比校正电路包括占空比控制器和数字占空比控制代码发生器。 占空比控制器通过基于数字占空比控制代码补偿第一和第二输入时钟信号的占空比来产生第一和第二输出时钟信号。 数字占空比控制码发生器基于通过转换第一输出时钟信号和第二输出时钟信号的占空比信息而获得的频率值来生成数字占空比控制码。