公开(公告)号：US20200244252A1

公开(公告)日：2020-07-30

申请号：US16734721

申请日：2020-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-min KIM ,  Kyung-hoon LEE ,  Eun-seok SHIN ,  Michael CHOI

IPC: H03K3/037 ,  H03K19/0185 ,  G09G3/3258

Abstract: A level shifter for outputting an output voltage having a voltage level range different from a voltage level range of a received input voltage is disclosed. The level shifter includes: a current mirror configured to copy a reference current flowing through a first mirror transistor to a second mirror transistor; a current mirror control circuit electrically connected to the current mirror by a sink node and including a plurality of control transistors configured to control the current mirror; and an output circuit configured to output an output voltage based on a voltage level of the sink node, wherein a first control transistor of the plurality of control transistors receives the output voltage fed back to a gate terminal of the first control transistor, and a second control transistor of the plurality of control transistors receives an inverted output voltage fed back to a gate terminal of the second control transistor.

公开(公告)号：US20170093418A1

公开(公告)日：2017-03-30

申请号：US15241262

申请日：2016-08-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Yeob BAEK ,  Eun Seok SHIN ,  Michael CHOI

IPC: H03M1/12 ,  H03M1/46

CPC classification number: H03M1/124 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/12 ,  H03M1/125 ,  H03M1/466 ,  H03M1/468

Abstract: A successive approximation register (SAR) analog-to-digital converter (ADC) includes a ring oscillator configured to determine a frequency based on a sampling clock signal and a first control code, and generate an output clock signal having the determined frequency. The SAR ADC further includes a controller configured to generate the first control code based on a count value indicating a number of times of toggling the output clock signal.

公开(公告)号：US20160028981A1

公开(公告)日：2016-01-28

申请号：US14730885

申请日：2015-06-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Ho LEE ,  Hae Sick SUL ,  Sin Hwan LIM ,  Kyung Min KIM ,  Ho Jin PARK ,  Jae Cheol YUN ,  Michael CHOI

IPC: H04N5/378 ,  H04N5/369 ,  H04N5/357

CPC classification number: H04N5/378 ,  H04N5/3698 ,  H04N5/3745

Abstract: An image processing device includes a switch signal generator, an amplifier, a ramp generator, and an attenuation control circuit. The switch signal generator generates switch control signals based on a level of an image signal that corresponds to a pixel signal output from a pixel. The amplifier includes a first input terminal and a second input terminal. The ramp generator generates a ramp signal. The attenuation control circuit adjusts an arrangement of capacitors according to the switch control signals to control whether to attenuate each of the pixel signal and the ramp signal, and transmits signals generated as a result of the adjusted arrangement to the first input terminal and the second input terminal.

Abstract translation: 图像处理装置包括开关信号发生器，放大器，斜坡发生器和衰减控制电路。 开关信号发生器基于与从像素输出的像素信号相对应的图像信号的电平产生开关控制信号。 放大器包括第一输入端和第二输入端。 斜坡发生器产生斜坡信号。 衰减控制电路根据开关控制信号调整电容器的布置，以控制是否衰减像素信号和斜坡信号中的每一个，并且将作为调整结果的结果产生的信号发送到第一输入端和第二输入端 终奌站。

公开(公告)号：US20150061904A1

公开(公告)日：2015-03-05

申请号：US14451080

申请日：2014-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Choong-Hoon LEE ,  Michael CHOI

IPC: H03M1/06 ,  H03M1/12 ,  H03M1/00

CPC classification number: H03M1/0617 ,  H03M1/001 ,  H03M1/002 ,  H03M1/1023 ,  H03M1/1245 ,  H03M1/468

Abstract: An analog-to-digital converter includes a digital-to-analog converting circuit, a comparator, a comparator offset detector, and a signal processing circuit. The digital-to-analog converting circuit generates a reference voltage signal that changes in response to a comparator offset compensation signal, samples and holds an analog input signal, and performs a digital-to-analog conversion on digital output data to generate a hold voltage signal. The comparator compares the hold voltage signal with the reference voltage signal in response to a clock signal to generate a comparison output voltage signal. The comparator offset detector generates the comparator offset compensation signal based on the comparison output voltage signal. The signal processing circuit performs successive approximation based on the comparison output voltage signal to generate the digital output data.

Abstract translation: 模数转换器包括数模转换电路，比较器，比较器偏移检测器和信号处理电路。 数模转换电路产生响应于比较器偏移补偿信号而改变的参考电压信号，采样并保持模拟输入信号，并对数字输出数据执行数模转换以产生保持电压 信号。 比较器响应于时钟信号将保持电压信号与参考电压信号进行比较，以产生比较输出电压信号。 比较器偏移检测器根据比较输出电压信号产生比较器偏移补偿信号。 信号处理电路基于比较输出电压信号进行逐次逼近以产生数字输出数据。