公开(公告)号：US11715252B2

公开(公告)日：2023-08-01

申请号：US17168168

申请日：2021-02-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keshavan Varadarajan ,  David C. Tannenbaum ,  F N U Gurupad

IPC: G06T1/20 ,  G06T15/00 ,  G06T15/80

CPC classification number: G06T15/005 ,  G06T1/20 ,  G06T15/80

Abstract: A GPU includes shader cores and a shader warp packer unit. The shader warp packer unit may receive a first primitive associated with a first partially covered quad, and a second primitive associated with a second partially covered quad. The shader warp packer unit may determine that the first partially covered quad and the second partially covered quad have non-overlapping coverage. The shader warp packer unit may pack the first partially covered quad and the second partially covered quad into a packed quad. The shader warp packer unit may send the packed quad to the shader cores. The first partially covered quad and the second partially covered quad may be spatially disjoint from each other. The shader cores may receive and process the packed quad with no loss of information relative to the shader cores individually processing the first partially covered quad and the second partially covered quad.

公开(公告)号：US11416960B2

公开(公告)日：2022-08-16

申请号：US17110284

申请日：2020-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： David C. Tannenbaum ,  Keshavan Varadarajan ,  Veynu Narasiman

IPC: G06T1/20 ,  G06T1/60

Abstract: A binning subsystem of a GPU includes a storage subsystem, a shader core to output first data via a first path, a selector to receive the first data via the first path, and to receive second data from the storage subsystem via a second path. The storage subsystem includes a binner unit and a control logic unit. The control logic unit causes the selector to transfer the first data or the second data to the binner unit. The binner unit may transfer binner output data to the shader core via a third path. The binner unit may transfer the binner output data to one or more subsequent stages of a graphics pipeline via a fourth path. The binner unit may transfer the binner output data to the storage subsystem via a fifth path. The control logic unit may control the binner unit such that the binner unit can be used for general purpose computation.