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11.
公开(公告)号:US20200341933A1
公开(公告)日:2020-10-29
申请号:US16928711
申请日:2020-07-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ramdas Kachare , Fred Worley , Xuebin YAO
IPC: G06F13/42 , H04L12/931 , G06F3/06 , G06F9/4401 , G06F13/16 , G06F13/40
Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.
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12.
公开(公告)号:US20190272249A1
公开(公告)日:2019-09-05
申请号:US16007949
申请日:2018-06-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul Olarig , Fred Worley
Abstract: According to some example embodiments, a system includes: at least one motherboard; at least one baseboard management controller (BMC); a mid-plane; and at least one storage device, wherein the at least one storage device is configured to operate in a first mode or a second mode based on a first input received from the at least one motherboard or the at least one BMC via a plurality of device ports over the mid-plane; and when operating in the second mode, the at least one storage device is configured to operate in a first speed from a plurality of operating speeds based on a second input received from the mid-plane via the plurality of device ports.
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公开(公告)号:US20190227744A1
公开(公告)日:2019-07-25
申请号:US15944594
申请日:2018-04-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul Olarig , Vikas K. Sinha , Fred Worley , Ramdas P. Kachare , Stephen G. Fischer
IPC: G06F3/06 , G06F12/0868 , G06F12/0806 , G06F13/42
Abstract: A system and method for providing erasure code data protection for an array of solid state drives. The solid state drives are connected to an Ethernet switch which includes a RAID control circuit, or a state machine, to process read or write commands that may be received from a remote host. The RAID control circuit, if present, uses a low-latency cache to execute write commands, and the state machine, if present, uses a local central processing unit, which in turn uses a memory as a low-latency cache, to similar effect.
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14.
公开(公告)号:US20190107956A1
公开(公告)日:2019-04-11
申请号:US15921400
申请日:2018-03-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ramdas Kachare , Fred Worley , Xuebin YAO
IPC: G06F3/06 , G06F13/16 , G06F13/40 , G06F9/4401
Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.
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公开(公告)号:US20190050289A1
公开(公告)日:2019-02-14
申请号:US15789884
申请日:2017-10-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ramdas P. Kachare , Fred Worley , Stephen Fischer , Oscar Pinto
Abstract: A system and method for distributed erasure coding. A plurality of storage devices is directly connected to one or more host computers, without an intervening central controller distributing data to the storage devices and providing data protection. Parity codes are stored in one or more dedicated storage devices or distributed over a plurality of the storage devices. When a storage device receives a write command, it calculates a partial parity code, and, if the parity code for the data being written is on another storage device, sends the partial parity code to the other storage device, which updates the parity code using the partial parity code.
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16.
公开(公告)号:US10146527B2
公开(公告)日:2018-12-04
申请号:US15376263
申请日:2016-12-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul Olarig , Son Pham , Fred Worley
Abstract: A method for upgrading a firmware of a target device includes: receiving a firmware upgrade request from an initiator, the firmware upgrade request including a target identification and a firmware image; authenticating the firmware upgrade request using a baseboard management controller (BMC) of a switching board; and performing the firmware upgrade of the target device using the BMC of the switching board.
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公开(公告)号:US10114778B2
公开(公告)日:2018-10-30
申请号:US15090409
申请日:2016-04-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Fred Worley , Harry Rogers , Sreenivas Krishnan , Zhan Ping , Michael Scriber
Abstract: A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.
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公开(公告)号:US20180284990A1
公开(公告)日:2018-10-04
申请号:US15618081
申请日:2017-06-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ramdas P. Kachare , Sompong Paul Olarig , Fred Worley
CPC classification number: G06F3/0605 , G06F3/0631 , G06F3/0632 , G06F3/0659 , G06F3/067 , G06F13/28 , G06F13/4022 , G06F13/4282 , G06F2213/0026
Abstract: In a method of storage aggregation for NVMe Over Fabrics devices, the method includes: identifying an aggregation group as an aggregated Ethernet SSD comprising a plurality of NVMe-oF SSDs; selecting one of the NVMe-oF SSDs of the aggregation group as a primary NVMe-oF SSD; selecting others of the NVMe-oF SSDs of the aggregation group as secondary NVMe-oF SSDs; and initializing a Map Allocation Table in the primary NVMe-oF SSD with a processor for managing the NVMe-oF SSDs.
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19.
公开(公告)号:US20180189635A1
公开(公告)日:2018-07-05
申请号:US15472061
申请日:2017-03-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong P. Olarig , Fred Worley , Nazanin Farahpour
CPC classification number: G06F16/9038 , G06F16/583 , G06F16/951 , G06N3/0454 , G06N3/0481 , G06N3/08 , G06T1/20 , G06T11/001
Abstract: A data storage device includes a memory array for storing data; a host interface for providing an interface with a host computer running an application; a central control unit configured to receive a command in a submission queue from the application and initiate a search process in response to a search query command; a preprocessor configured to reformat data contained in the search query command and generate a reformatted data; and one or more data processing units configured to extract one or more features from the reformatted data and perform a data operation on the data stored in the memory array in response to the search query command and return matching data from the data stored in the memory array to the application via the host interface.
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公开(公告)号:US20180167352A1
公开(公告)日:2018-06-14
申请号:US15408168
申请日:2017-01-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Fred Worley , Sompong P. Olarig , Son T. Pham
IPC: H04L29/12
CPC classification number: H04L61/2521 , H04L61/2514 , H04L61/2517 , H04L69/22
Abstract: A method includes: receiving a Transmission Control Protocol (TCP)/Internet Protocol (IP) packet from an initiator, wherein the TCP/IP packet includes an IP address of a switch and a port number; looking up an address translation table based on the IP address of the switch and the port number; translating the IP address of the switch to a private IP address based on the port number according to address mapping information stored in the address translation table; and routing the TCP/IP packet to a non-volatile memory express over fabrics (NVMeoF) device having the private IP address. A network address translation (NAT) router implemented in the switch is configured to perform the address translation from the IP address of the switch to the private IP address of the NVMeoF device.
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