公开(公告)号：US20220093717A1

公开(公告)日：2022-03-24

申请号：US17318051

申请日：2021-05-12

Applicant: Samsung Display Co., Ltd.

Inventor： WONTAE KIM ,  MYEONGSU KIM ,  BOYEON KIM ,  JAE-HAN LEE ,  WHEE-WON LEE

IPC: H01L27/32 ,  G09G3/3208

Abstract: A display device includes a display panel including an edge extending along a first direction, a main circuit board adjacent to the edge of the display panel, and a connection circuit board which connects the main circuit board to the display panel at the edge thereof. The connection circuit board includes a plurality of board side pads which are arranged along the first direction and at which the connection circuit board is connected to the main circuit board. Each of the plurality of board side pads includes a first pad, and a second pad adjacent to the first pad along the first direction. The second pad includes a plurality of signal pads which are arranged along a second direction which crosses the first direction and are each aligned with the first pad along the first direction.

公开(公告)号：US20220022318A1

公开(公告)日：2022-01-20

申请号：US17199723

申请日：2021-03-12

Applicant: Samsung Display Co., Ltd.

Inventor： WONTAE KIM ,  JAE-HAN LEE

IPC: H05K1/11

Abstract: A display device includes a display panel including first and second signal pads respectively disposed at one side and the other side of a center axis extending in a first direction and first and second fixing pads spaced apart from each other with the first and second signal pads interposed therebetween, and a flexible film including connection pads overlapping the signal pads and first and second alignment pads groups spaced apart from each other with the connection pads interposed therebetween. The first alignment pad group includes n first alignment pads arranged in the first direction, the second alignment pad group includes n second alignment pads corresponding to the first alignment pads, and a distance between corresponding first and second alignment pads decreases as a distance thereof from a display area decreases.

公开(公告)号：US20190235311A1

公开(公告)日：2019-08-01

申请号：US16121383

申请日：2018-09-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： HEE-KEUN LEE ,  YEOGEON YOON ,  JANGSOO KIM ,  WONTAE KIM ,  HOON KIM ,  SEUNG-JIN CHU

IPC: G02F1/1335

CPC classification number: G02F1/133516 ,  G02F1/133512 ,  G02F1/133617 ,  G02F1/1368 ,  G02F2001/133519 ,  G02F2202/108

Abstract: A color conversion panel includes a substrate that includes first to third pixel areas, a first color conversion layer on the substrate in the first pixel area that converts incident light into first color light, a second color conversion layer on the substrate in the second pixel area that converts the incident light into second color light, a first color filter layer between the substrate and the first color conversion layer that has the first color and blocks incident light not converted by the first color conversion layer, a second color filter layer between the substrate and the second color conversion layer that has a third color and blocks incident light not converted by the second color conversion layer, and a light shielding layer on the substrate between the second and the third pixel areas that has the first color.

公开(公告)号：US20220384400A1

公开(公告)日：2022-12-01

申请号：US17731099

申请日：2022-04-27

Applicant: Samsung Display Co., LTD.

Inventor： SEUNG-KYU LEE ,  WONTAE KIM ,  HYUNGJUNE KIM

IPC: H01L25/16 ,  H01L33/64

Abstract: A mother panel for a display panel includes: a mother substrate including a display panel area and a dummy area surrounding the display panel area, the mother substrate having a cutting line defined thereon, wherein the cutting line is configured to be irradiated by a laser along a boundary between the display panel area and the dummy area; and a first heat dissipation pattern on the mother substrate, extending from the display panel area to the dummy area to overlap the cutting line, and including a first rod portion including a plurality of lower rods spaced apart from each other and a first body portion in the dummy area and contacting the first rod portion.

公开(公告)号：US20210256923A1

公开(公告)日：2021-08-19

申请号：US17307550

申请日：2021-05-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： BOYEON KIM ,  WONTAE KIM ,  TAEGON IM

IPC: G09G3/36

Abstract: A display device may include a data driver that outputs a previous data voltage and a current data voltage, respectively, at an output terminal, to be applied to a pixel of a display panel in respective time intervals. A switch is controlled to open and close a circuit path between the output terminal and a data line coupled to the pixel. A capacitor stores an overdriving voltage.
At least one further switch selectively applies the overdriving voltage to the data line from the capacitor when the circuit path is open and thereby enables a rapid transition of a voltage level of the data line between the previous and current data voltages, when the current and previous data voltages are to differ by more than a predetermined amount. As an example, the rapid transition between the previous and current data voltages may serve to minimize a color mixture phenomenon between pixels connected to a common data line and representing different colors.

公开(公告)号：US20200184918A1

公开(公告)日：2020-06-11

申请号：US16794787

申请日：2020-02-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： WONTAE KIM ,  Sooyeon Kim ,  Young-Il Ban ,  Sunkyu Son

IPC: G09G3/36

Abstract: Provided is a data integrated circuit including: a data driving circuit, a shift register configured to output a plurality of latch clock signals, a latch configured to latch a plurality of image signals in response to the plurality of latch clock signals and output a plurality of digital image signals in response to a plurality of latch output signals, and a clock generator configured to divide a main clock signal into the plurality of latch output signals and output the plurality of divided latch output signals to the latch. At least two of the latch output signals are activated at different time intervals

公开(公告)号：US20180012553A1

公开(公告)日：2018-01-11

申请号：US15646536

申请日：2017-07-11

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： BOYEON KIM ,  WONTAE KIM ,  TAEGON IM

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/2011 ,  G09G3/3607 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2310/027 ,  G09G2310/08 ,  G09G2320/0242 ,  G09G2320/0252 ,  G09G2320/0276 ,  G09G2320/103 ,  G09G2330/06 ,  G09G2330/12

Abstract: A display device may include a data driver that outputs a previous data voltage and a current data voltage, respectively, at an output terminal, to be applied to a pixel of a display panel in respective time intervals. A switch is controlled to open and close a circuit path between the output terminal and a data line coupled to the pixel. A capacitor stores an overdriving voltage. At least one further switch selectively applies the overdriving voltage to the data line from the capacitor when the circuit path is open and thereby enables a rapid transition of a voltage level of the data line between the previous and current data voltages, when the current and previous data voltages are to differ by more than a predetermined amount. As an example, the rapid transition between the previous and current data voltages may serve to minimize a color mixture phenomenon between pixels connected to a common data line and representing different colors.

公开(公告)号：US20170323611A1

公开(公告)日：2017-11-09

申请号：US15461931

申请日：2017-03-17

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： GUHUI JO ,  SUN-KOO KANG ,  WONTAE KIM

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3688 ,  G09G3/3696 ,  G09G2310/027 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/08

Abstract: A display apparatus includes a display panel and a data driver. The display panel is configured to display an image and includes first through fourth data line groups. The first and second data line groups are adjacent to each other, and the third and fourth data line groups are adjacent to each other. The data driver includes a first data driving circuit configured to output first data voltages to the second data line group later than to the first data line group by a first delay time, and configured to output second data voltages to the fourth data line group later than to the third data line group by a second delay time that is different from the first delay time.

公开(公告)号：US20170309244A1

公开(公告)日：2017-10-26

申请号：US15456720

申请日：2017-03-13

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： WONTAE KIM ,  GUHUI JO

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G2310/0251 ,  G09G2310/0291 ,  G09G2310/06 ,  G09G2310/08 ,  G09G2320/0223

Abstract: A data driver includes an N-th amplifier including first and second input nodes and a first output node and configured to output an N-th data voltage to an N-th data line, the first input node receiving the N-th data voltage from an N-th node, the second input node being connected to the first output node, a first switch connected between the N-th node and the first input node, and a second switch connected between the first input node and the second input node.

公开(公告)号：US20160267871A1

公开(公告)日：2016-09-15

申请号：US14863929

申请日：2015-09-24

Applicant: SAMSUNG DISPLAY CO, LTD.

Inventor： WONTAE KIM ,  SOOYEON KIM ,  YOUNG-IL BAN ,  SUNKYU SON

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/3688 ,  G09G3/3611 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0223 ,  G09G2370/08

Abstract: Provided is a data integrated circuit including: a data driving circuit, a shift register configured to output a plurality of latch clock signals, a latch configured to latch a plurality of image signals in response to the plurality of latch clock signals and output a plurality of digital image signals in response to a plurality of latch output signals, and a clock generator configured to divide a main clock signal into the plurality of latch output signals and output the plurality of divided latch output signals to the latch. At least two of the latch output signals are activated at different time intervals

Abstract translation: 提供了一种数据集成电路，包括：数据驱动电路，配置为输出多个锁存时钟信号的移位寄存器，配置成响应于多个锁存时钟信号而锁存多个图像信号的锁存器，并输出多个 响应于多个锁存输出信号的数字图像信号;以及时钟发生器，被配置为将主时钟信号分割成多个锁存输出信号，并将多个分割的锁存输出信号输出到锁存器。 至少两个锁存器输出信号以不同的时间间隔被激活