公开(公告)号：US20160125792A1

公开(公告)日：2016-05-05

申请号：US14751944

申请日：2015-06-26

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Han LEE ,  Sooyeon Kim ,  Young-II Ban ,  Sunkyu Son

IPC: G09G3/20 ,  G09G3/00

CPC classification number: G09G3/2096 ,  G02F1/13452 ,  G09G3/006 ,  G09G3/20 ,  G09G2300/0413 ,  G09G2310/0275 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/12

Abstract: A display device including: a display panel displaying an image based on first and second frames; a timing controller outputting a plurality of image signals for each of the first and second frames and outputting a test signal during a reset section; and a source driving chip outputting a plurality of data voltages corresponding to the image signals or a test voltage corresponding to the test signal. The reset section is arranged after the first frame and before the second frame, and the source driving chip blocks the data voltage in the second frame from being output to driving lines having an arrival time period equal to or less than a reference time period during the reset section, the arrival time period representing the amount of time taken to arrive at the test voltage from an initial voltage.

Abstract translation: 一种显示装置，包括：基于第一和第二帧显示图像的显示面板; 定时控制器，为第一和第二帧中的每一个输出多个图像信号，并在复位部分期间输出测试信号; 以及源极驱动芯片，其输出对应于图像信号的多个数据电压或对应于测试信号的测试电压。 复位部分布置在第一帧之后和第二帧之前，并且源驱动芯片阻止第二帧中的数据电压被输出到具有等于或小于参考时间段的到达时间段的驱动线 复位部分，表示从初始电压到达测试电压所花费的时间量的到达时间段。

公开(公告)号：US20230075010A1

公开(公告)日：2023-03-09

申请号：US18050080

申请日：2022-10-27

Applicant: Samsung Display Co., Ltd.

Inventor： WONTAE KIM ,  Sooyeon Kim ,  Young-Il Ban ,  Sunkyu Son

IPC: G09G3/36

Abstract: Provided is a data integrated circuit including: a data driving circuit, a shift register configured to output a plurality of latch clock signals, a latch configured to latch a plurality of image signals in response to the plurality of latch clock signals and output a plurality of digital image signals in response to a plurality of latch output signals, and a clock generator configured to divide a main clock signal into the plurality of latch output signals and output the plurality of divided latch output signals to the latch. At least two of the latch output signals are activated at different time intervals

公开(公告)号：US11488560B2

公开(公告)日：2022-11-01

申请号：US16794787

申请日：2020-02-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Wontae Kim ,  Sooyeon Kim ,  Young-Il Ban ,  Sunkyu Son

IPC: G09G3/36

Abstract: Provided is a data integrated circuit including: a data driving circuit, a shift register configured to output a plurality of latch clock signals, a latch configured to latch a plurality of image signals in response to the plurality of latch clock signals and output a plurality of digital image signals in response to a plurality of latch output signals, and a clock generator configured to divide a main clock signal into the plurality of latch output signals and output the plurality of divided latch output signals to the latch. At least two of the latch output signals are activated at different time intervals.

公开(公告)号：US09734752B2

公开(公告)日：2017-08-15

申请号：US14751944

申请日：2015-06-26

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Han Lee ,  Sooyeon Kim ,  Young-Il Ban ,  Sunkyu Son

IPC: G09G3/20 ,  G09G3/00 ,  G02F1/1345

CPC classification number: G09G3/2096 ,  G02F1/13452 ,  G09G3/006 ,  G09G3/20 ,  G09G2300/0413 ,  G09G2310/0275 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/12

Abstract: A display device including: a display panel displaying an image based on first and second frames; a timing controller outputting a plurality of image signals for each of the first and second frames and outputting a test signal during a reset section; and a source driving chip outputting a plurality of data voltages corresponding to the image signals or a test voltage corresponding to the test signal. The reset section is arranged after the first frame and before the second frame, and the source driving chip blocks the data voltage in the second frame from being output to driving lines having an arrival time period equal to or less than a reference time period during the reset section, the arrival time period representing the amount of time taken to arrive at the test voltage from an initial voltage.

公开(公告)号：US09633589B2

公开(公告)日：2017-04-25

申请号：US14608657

申请日：2015-01-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sujin Kim ,  Young-Il Ban ,  Sun-Koo Kang ,  Sunkyu Son

IPC: G09G5/00 ,  G09G3/20 ,  G09G3/36 ,  H01L27/02

CPC classification number: G09G3/20 ,  G09G3/3685 ,  G09G2300/0426 ,  G09G2300/08 ,  G09G2330/025 ,  G09G2330/04 ,  H01L27/0266

Abstract: A display device includes a first interconnection line, a first data driver, a second interconnection line, an electrostatic discharge (ESD) circuit, and a display panel. The first connection line transmits a data driving signal. The first data driver includes the first interconnection line and output a data signal based on the data driving signal. The second interconnection line passes through the first data driver and transmits a gate driving signal. The ESD) circuit in the first data driver and discharges static electricity transmitted through the second interconnection line. The first gate driver outputs a gate signal based on the gate driving signal transmitted through the second interconnection line. The display panel receives the data signal and the gate signal.

公开(公告)号：US20160104450A1

公开(公告)日：2016-04-14

申请号：US14693754

申请日：2015-04-22

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Han LEE ,  Taegon KIM ,  Sunkyu Son ,  Byungkil Jeon ,  Dong-Hyun Yeo

IPC: G09G5/00

CPC classification number: G09G3/3688 ,  G09G3/3611 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2320/041 ,  G09G2330/045 ,  G09G2352/00 ,  G09G2370/08

Abstract: Disclosed is a display apparatus including: a display panel including pixels connected with a plurality of gate lines and a plurality of data lines; a gate driver supplying gate signals to the gate lines; and a data driver supplying data voltages to the data lines. The data driver includes a temperature measurer generating a temperature signal of the data driver.

Abstract translation: 公开了一种显示装置，包括：显示面板，包括与多条栅极线连接的像素和多条数据线; 栅极驱动器向栅极线提供栅极信号; 以及向数据线提供数据电压的数据驱动器。 数据驱动器包括产生数据驱动器的温度信号的温度测量器。

公开(公告)号：US09030451B2

公开(公告)日：2015-05-12

申请号：US13778414

申请日：2013-02-27

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Han Lee ,  Sunkyu Son ,  Sun-Koo Kang

IPC: G09G5/00 ,  G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3614 ,  G09G3/3685

Abstract: A display driving circuit includes a digital-to-analog converter configured to convert a digital image signal to an analog image signal, and a buffer circuit configured to receive the analog image signal and to output an output signal to be applied to a data line, where the buffer circuit includes an input stage configured to receive the analog image signal and to output a first signal, a first output stage configured to receive a first voltage and a second voltage and to output the output signal, a second output stage configured to receive a third voltage and a fourth voltage and to output the output signal, and a selection circuit configured to apply the first signal from the input stage to the first output stage or the second output stage in response to a mode signal.

Abstract translation: 显示驱动电路包括被配置为将数字图像信号转换为模拟图像信号的数模转换器，以及配置为接收模拟图像信号并输出​​要施加到数据线的输出信号的缓冲电路， 其中所述缓冲电路包括被配置为接收所述模拟图像信号并输出​​第一信号的输入级，被配置为接收第一电压和第二电压并输出所述输出信号的第一输出级，被配置为接收 第三电压和第四电压并输出输出信号;以及选择电路，被配置为响应于模式信号将来自输入级的第一信号施加到第一输出级或第二输出级。