公开(公告)号：US11996049B2

公开(公告)日：2024-05-28

申请号：US18311398

申请日：2023-05-03

Applicant: Samsung Display Co., Ltd.

Inventor： Sangyong No ,  Gichang Lee

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/0202 ,  G09G2310/0205 ,  G09G2310/0262 ,  G09G2310/08 ,  G09G2320/0257 ,  G09G2330/021

Abstract: A pixel including a control transistor electrically connected between a gate of a switching transistor or another switching transistor and a node, and that controls a bias state of a driving transistor according to a voltage of a first gate signal for controlling turn-on of the switching transistor and a voltage of a second gate signal for controlling turn-on of the other switching transistor.

公开(公告)号：US10317744B2

公开(公告)日：2019-06-11

申请号：US14924195

申请日：2015-10-27

Applicant: Samsung Display Co., Ltd.

Inventor： Sangyong No

IPC: H01L27/12 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368

Abstract: A display device includes a first substrate; a gate line on the first substrate; a data line disposed to intersect the gate line; a thin film transistor (TFT) connected to the gate line and the data line; a pixel electrode connected to the TFT; a second substrate opposed to the first substrate; and a light blocking member on the second substrate, the light blocking member at least partially overlapping the gate line, the data line, and the TFT and defining a pixel region. The pixel electrode may be disposed further away from the center portion of the pixel region, from the center portion of the first substrate toward the left and right sides thereof.

公开(公告)号：US10204564B2

公开(公告)日：2019-02-12

申请号：US15234441

申请日：2016-08-11

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sangyong No ,  Jiho Moon

IPC: H01L27/12 ,  G09G3/3275 ,  G09G3/36 ,  G06F13/16 ,  G11C19/28 ,  G02F1/1345 ,  G02F1/136

Abstract: A display device includes a first substrate and a second substrate opposite to each other, a gate line on the first substrate, a gate driver which is connected to the gate line, a clock line which transmits a clock signal, a connecting line which connects the clock line and the gate driver, a common electrode on the second substrate, the common electrode overlapping the clock line and the connecting line, and a compensation pattern which overlaps the common electrode and extends from the connecting line.