公开(公告)号：US12136631B2

公开(公告)日：2024-11-05

申请号：US18514930

申请日：2023-11-20

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yoon-Jong Cho ,  Seokje Seong ,  Seongjun Lee ,  Yoonjee Shin ,  Suyeon Yun ,  Wooho Jeong ,  Joonhoo Choi

IPC: H01L27/12 ,  G09G3/3266 ,  G09G3/3275 ,  H10K50/11 ,  H10K50/844 ,  H10K59/126 ,  H10K59/131 ,  H10K71/00 ,  H10K77/10 ,  H10K102/00

Abstract: A display panel includes a base layer including a first area and a second area. At least one inorganic layer disposed on the base layer overlaps the first area and the second area. The at least one inorganic layer comprises a lower opening. A first thin-film transistor is disposed on the at least one inorganic layer. The first thin-film transistor includes a silicon semiconductor pattern. A second thin-film transistor is disposed on the at least one inorganic layer. The second thin-film transistor includes an oxide semiconductor pattern. A plurality of insulation layers overlap the first area and the second area. An upper opening extends from the lower opening. A signal line is electrically connected to the second thin-film transistor. An organic layer is disposed in the lower opening and the upper opening. A light emitting element is disposed on the organic layer.

公开(公告)号：US11651711B2

公开(公告)日：2023-05-16

申请号：US17239910

申请日：2021-04-26

Applicant: Samsung Display Co., Ltd.

Inventor： Jeongweon Seo ,  Jahun Koo ,  Jihyun Kim ,  Jinsoo Shin ,  Kiseok Cha ,  Joonhoo Choi

IPC: H05K5/00 ,  G09F9/30 ,  H05K1/02 ,  H05K1/18

CPC classification number: G09F9/301 ,  H05K1/028 ,  H05K1/189 ,  H05K2201/10128

Abstract: A display device includes a display substrate comprising a polymer layer including a first non-bending area, a second non-bending area that overlaps the first non-bending area when viewed in a plan view, and a bending area arranged between the first non-bending area and the second non-bending area. A display element layer is disposed on the polymer layer. A plurality of signal pad groups is disposed in the second non-bending area and is configured to be electrically connected to the display element layer. An upper substrate is disposed on a top surface of the display substrate. A flexible circuit board comprising a plurality of connection pad groups is arranged in correspondence to the signal pad groups. An area of the upper substrate is larger than an area of the display substrate when viewed in a plan view.

公开(公告)号：US20230087942A1

公开(公告)日：2023-03-23

申请号：US18059800

申请日：2022-11-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YOON-JONG CHO ,  Suyeon Yun ,  Seokje Seong ,  Seongjun Lee ,  Joonhoo Choi ,  Semyung Kwon ,  Kyunghyun Baek

IPC: H01L27/32 ,  H01L27/12 ,  G09G3/3225 ,  H01L51/52

Abstract: A display panel includes a base layer having a first region and a bent second region. An inorganic layer is disposed on the base layer. A lower groove is formed within the inorganic layer and overlaps the second region. A first thin-film transistor is disposed on the inorganic layer and includes a silicon semiconductor pattern overlapping the first region. A second thin-film transistor is disposed on the inorganic layer and includes an oxide semiconductor pattern overlapping the first region. Insulating layers overlap the first and second regions. An upper groove is formed within the insulating layers. A signal line electrically connects the second thin-film transistor. An organic layer overlaps the first and second regions and is disposed in the lower and upper grooves. A luminescent device is disposed on the organic layer and overlaps the first region.

公开(公告)号：US10665617B2

公开(公告)日：2020-05-26

申请号：US16139512

申请日：2018-09-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yoon-jong Cho ,  Seokje Seong ,  Seongjun Lee ,  Yoonjee Shin ,  Suyeon Yun ,  Wooho Jeong ,  Joonhoo Choi

IPC: H01L51/50 ,  H01L27/12 ,  H01L27/32 ,  G09G3/3266 ,  G09G3/3275 ,  H01L51/56 ,  H01L51/00 ,  H01L51/52

Abstract: A display panel includes a base layer including a first area and a second area. At least one inorganic layer disposed on the base layer overlaps the first area and the second area. The at least one inorganic layer comprises a lower opening. A first thin-film transistor is disposed on the at least one inorganic layer. The first thin-film transistor includes a silicon semiconductor pattern. A second thin-film transistor is disposed on the at least one inorganic layer. The second thin-film transistor includes an oxide semiconductor pattern. A plurality of insulation layers overlap the first area and the second area. An upper opening extends from the lower opening. A signal line is electrically connected to the second thin-film transistor. An organic layer is disposed in the lower opening and the upper opening. A light emitting element is disposed on the organic layer.