Abstract:
An image display system includes a graphic processor which generates an image signal, a control signal, and a variable frequency signal; and a display device which displays an image at a frame frequency corresponding to the variable frequency signal from the graphic processor. The display device includes pixels connected to emission control lines, data lines, and scan lines; a controller which provides reference data including information on reference cycles, which are cycles in which an emission control start signal is output, to the graphic processor, outputs the emission control start signal based on the control signal, and adjusting an output timing of a scan start signal based on the variable frequency signal; an emission driver which supplies emission control signals to the emission control lines based on the emission control start signal; and a scan driver which supplies scan signals to the scan lines based on the scan start signal.
Abstract:
A display device driving method includes: providing a reference voltage for compensating a threshold voltage of a driving transistor in a pixel; and providing a data signal to the pixel, wherein providing the reference voltage, and providing the data signal to the pixel are performed in a first frame period, and a second frame period successive to the first frame period, wherein the display device driving method further comprises providing a compensation signal generated by comparing a data signal with a reference voltage provided in a previous frame period of each frame period to the pixel before providing the reference voltage is ended.
Abstract:
An organic light emitting display device includes: a compensator configured to extract current information of organic light emitting diodes in pixels; and a timing controller configured to determine a luminance compensation amount corresponding to the current information and to generate second data by adjusting bits of first data supplied from an outside, the first data being adjusted corresponding to the luminance compensation amount, wherein the compensator is further configured to divide a current variation corresponding to deterioration of the organic light emitting diodes into k sections and to calculate the luminance compensation amount using a linear function of a luminance variation corresponding to the current variation at each of the k sections.
Abstract:
A display device includes pixels including a light-emitting element, and an initialization transistor connected between an anode electrode of the light-emitting element and a first initialization power line to which a voltage of initialization power is supplied, and turned on when an initialization scan signal is supplied, and an initialization scan driver which supplies the initialization scan signal. The initial scan driver supplies an i-th (i is a natural number) initial scan signal to overlap an (i−1)-th initial scan signal, and supplies an (i+1)-th initial scan signal so as not to overlap the i-th initial scan signal, and the initialization scan signal is set to a gate-on voltage.
Abstract:
A pixel includes: a light emitting element; a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is to be applied, and a third node electrically connected to the light emitting element; and a bias control transistor configured to be controlled in operating timing thereof by a bias control signal, and configured to switch electrical connection between the second node and a bias power line for transmitting a bias voltage. In one frame period, a voltage level of the bias voltage to be applied to the second node sequentially increases.
Abstract:
A display device includes: a display panel including pixels having light-emitting elements; a timing control unit for variably changing the driving frame frequency of the display panel according to the input frame frequency of digital video data; and a data driving unit for outputting data voltages according to the digital video data, wherein the display panel operates at a first frame frequency for a first frame period and operates at a second frame frequency, which is lower than the first frame frequency, for a second frame period, the second frame period includes a data addressing period in which a data voltage corresponding to each of the pixels is applied to the pixels, and a blank period in which no data voltage is applied to each of the pixels, and the blank period includes a period of initializing a first electrode of a light-emitting element into an initialization voltage.
Abstract:
A display device includes: a pixel connected to a first scan line, a second scan line, and a data line, and including a light emitting element and a storage capacitor; and a timing controller configured to drive the pixel in a normal mode in which a driving frequency is maintained constant or a frequency variable mode according to a variable frequency signal supplied from outside, wherein in the normal mode, a first electrode voltage of the light emitting element is initialized in response to a data voltage being supplied to the storage capacitor, and wherein in the frequency variable mode, the first electrode voltage of the light emitting element is not initialized in response to the data voltage being supplied to the storage capacitor.
Abstract:
Disclosed herein is a display device. The display device includes a plurality of data lines to supply data signals, a plurality of pixels each including a light-emitting element, a first transistor to control current flowing through the light-emitting element, and a second transistor connected between the first transistor and one of the plurality of data lines, and a conductive pattern disposed on and connected to the second transistor through a first contact hole. The data line is disposed on a layer different from that of the bridge pattern, and is connected to the bridge pattern through a second contact hole. The first contact hole and the second contact hole overlap each other, when viewed on a plane.
Abstract:
A display device is disclosed that includes a pixel. The pixel includes a first transistor connected between a second node and a third node and including a gate electrode connected to a first node. A first capacitor is formed between the first node and a fourth node. A second capacitor is formed between the fourth node and a first power line. A second transistor is connected between a data line and the fourth node. An eighth transistor is connected between the first power line and the second node. A ninth transistor is connected between the second node and a bias power line. A sixth transistor is connected between the third node and a fifth node. A light emitting element is electrically connected between the fifth node and a second power line. A gate electrode of the eighth transistor and a gate electrode of the sixth transistor are connected to different gate lines.
Abstract:
A pixel includes: a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is applied, and a third node electrically connected to the light emitting element; a first emission control transistor having an on-off timing controlled by a first emission control signal; and a second emission control transistor having an on-off timing controlled by a second emission control signal. A time interval exists between a time at which the first emission control signal having a turn-on level is input such that a voltage of the second node is dropped from a bias voltage having a voltage level higher than a voltage level of the first power voltage and a time at which the second emission control signal having a turn-on level is input.