公开(公告)号：US20230413624A1

公开(公告)日：2023-12-21

申请号：US18242713

申请日：2023-09-06

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Junyoung MIN ,  Jaewon KIM ,  Junwon CHOI

IPC: H10K59/131 ,  H10K59/65 ,  H10K59/121

CPC classification number: H10K59/131 ,  H10K59/65 ,  H10K59/1213 ,  H01L29/7869

Abstract: A display device includes: a substrate in which a transmission area, a display area, a non-display area and the display area, and a peripheral area are defined; pixels arranged on the display area; initialization gate lines and compensation gate lines extending along pixel rows; gate driving circuits disposed on the peripheral area; and gate connection lines disposed on the non-display area. A k-th gate driving circuit among the gate driving circuits simultaneously drives m-th and (m+1)-th initialization gate lines and n-th and (n+1)-th compensation gate lines. First portions of the n-th and (n+1)-th compensation gate lines and second portions of the n-th and (n+1)-th compensation gate lines, which are physically apart from each other by the transmission area, are electrically connected to each other through a first gate connection line among gate connection lines.

公开(公告)号：US20200176551A1

公开(公告)日：2020-06-04

申请号：US16687917

申请日：2019-11-19

Applicant: Samsung Display Co., Ltd.

Inventor： Hyunae PARK ,  Jaewon KIM ,  Seungwoo SUNG ,  Jun-yong AN ,  Nuree UM ,  Ji-eun LEE ,  Yun-kyeong IN ,  Donghyeon JANG ,  Seunghan JO ,  Junyoung JO

IPC: H01L27/32 ,  H01L51/52 ,  G09G3/3225 ,  G09G3/3266

Abstract: A display panel includes a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.