Abstract:
A thin film transistor array substrate includes a thin film transistor including a first gate electrode, an active layer, a source electrode, and a drain electrode. A first conductive layer pattern is on a same layer as the source electrode and the drain electrode and formed of a same material as the source electrode and the drain electrode. An insulating layer is on the first conductive layer pattern and has an opening exposing a patterning cross-section of the first conductive layer pattern. A pixel electrode is on the insulating layer and is coupled to the source electrode or the drain electrode through a contact hole passing through the insulating layer. A diffusion prevention layer covers the patterning cross-section of the first conductive layer pattern and inclined side surfaces of the insulating layer exposed through the opening.
Abstract:
A thin film transistor array substrate includes a thin film transistor including a first gate electrode, an active layer, a source electrode, and a drain electrode. A first conductive layer pattern is on a same layer as the source electrode and the drain electrode and formed of a same material as the source electrode and the drain electrode. An insulating layer is on the first conductive layer pattern and has an opening exposing a patterning cross-section of the first conductive layer pattern. A pixel electrode is on the insulating layer and is coupled to the source electrode or the drain electrode through a contact hole passing through the insulating layer. A diffusion prevention layer covers the patterning cross-section of the first conductive layer pattern and inclined side surfaces of the insulating layer exposed through the opening.
Abstract:
A display apparatus including a substrate, a display portion disposed on an active area defined at the substrate, a buffer layer disposed on the active area and a pad area defined at the substrate, a touch sensing portion disposed on the buffer layer, and a pad portion disposed between the pad area and the buffer layer. The touch sensing portion includes a first pad pattern, a middle layer disposed on the first pad pattern, and a second pad pattern disposed on the middle layer. The first pad pattern is connected to the pad portion through a first contact hole defined on the pad portion in the buffer layer. The second pad pattern is connected to the first pad pattern through a second contact hole defined on the first contact hole in the middle layer.
Abstract:
A unit pixel includes a circuit structure, first and second wiring patterns, an interlayer insulating layer, a planarization layer, and a light emission structure. The first wiring pattern disposed on the circuit structure has a first bump structure. The interlayer insulating layer covers the circuit structure and the first wiring pattern. The second wiring pattern disposed on the interlayer insulating layer overlaps the first wiring pattern and has a second bump structure. The planarization layer covers the interlayer insulating layer and the second wiring pattern and includes a via-hole exposing at least a portion of be second wiring pattern. The light emission structure contacts the second wiring pattern through the via-hole. The first and second wiring patterns and the interlayer insulating layer form a capacitor, the light emission structure includes an OLED, and the capacitor is directly connected to an anode of the OLED.
Abstract:
A display device includes a display panel including a display unit configured to display an image, a pad portion disposed in a periphery of the display unit, the pad portion configured to receive a driving signal for driving the display unit, and a touch sensor disposed on the display panel. The touch sensor includes sensing electrodes disposed on the display panel, and touch wires electrically connected to the pad portion and disposed on the display panel, the touch wires being respectively connected to the sensing electrodes to transmit a touch signal.
Abstract:
A display apparatus including a substrate, a display portion disposed on an active area defined at the substrate, a buffer layer disposed on the active area and a pad area defined at the substrate, a touch sensing portion disposed on the buffer layer, and a pad portion disposed between the pad area and the buffer layer. The touch sensing portion includes a first pad pattern, a middle layer disposed on the first pad pattern, and a second pad pattern disposed on the middle layer. The first pad pattern is connected to the pad portion through a first contact hole defined on the pad portion in the buffer layer. The second pad pattern is connected to the first pad pattern through a second contact hole defined on the first contact hole in the middle layer.
Abstract:
A thin film transistor array substrate includes a thin film transistor including a first gate electrode, an active layer, a source electrode, and a drain electrode. A first conductive layer pattern is on a same layer as the source electrode and the drain electrode and formed of a same material as the source electrode and the drain electrode. An insulating layer is on the first conductive layer pattern and has an opening exposing a patterning cross-section of the first conductive layer pattern. A pixel electrode is on the insulating layer and is coupled to the source electrode or the drain electrode through a contact hole passing through the insulating layer. A diffusion prevention layer covers the patterning cross-section of the first conductive layer pattern and inclined side surfaces of the insulating layer exposed through the opening.