DISPLAY DEVICE
    11.
    发明申请

    公开(公告)号:US20230114014A1

    公开(公告)日:2023-04-13

    申请号:US17880632

    申请日:2022-08-03

    Abstract: A display device includes a substrate, and unit pixels provided in the substrate, and including sub-pixels each having a light-emitting element emitting light, and photo-sensing pixels each having a light-receiving element outputting a sensing signal corresponding to the light. Each of the sub-pixels may include an emission area emitting the light, and each of the photo-sensing pixels may include a light-receiving area receiving the light. The emission area and the light-receiving area may be provided in the substrate to be spaced apart from each other. Each of the emission area and the light-receiving area may have a shape of a quadrangular plane.

    DISPLAY DEVICE
    12.
    发明申请

    公开(公告)号:US20220028944A1

    公开(公告)日:2022-01-27

    申请号:US17210607

    申请日:2021-03-24

    Abstract: An exemplary embodiment of the present inventive concept provides a display device including: a substrate; a plurality of first wires extending along a first direction on the substrate; a first insulating layer disposed on the plurality of first wires; a plurality of second wires disposed on the first insulating layer and extending along a second direction crossing the first direction; a second insulating layer disposed on the plurality of second wires; and a plurality of pixel electrodes disposed on the second insulating layer, wherein the second insulating layer includes a first opening which is disposed between the plurality of pixel electrodes.

    Thin film transistor array panel
    13.
    发明授权

    公开(公告)号:US11217696B2

    公开(公告)日:2022-01-04

    申请号:US16354396

    申请日:2019-03-15

    Abstract: A thin film transistor array panel includes a substrate, a first gate electrode on the substrate, a semiconductor layer on the first gate electrode, the semiconductor layer including a drain region, a source region, a lightly doped drain (LDD) region, and a channel region, a second gate electrode on the semiconductor layer, the first gate electrode and the second gate electrode each overlapping the channel region, a control gate electrode that overlaps the LDD region, and a source electrode and a drain electrode respectively connected with the source region and the drain region of the semiconductor layer.

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