公开(公告)号：US20230326411A1

公开(公告)日：2023-10-12

申请号：US18116104

申请日：2023-03-01

Applicant: Samsung Display Co., Ltd.

Inventor： Haijung In ,  Minku Lee ,  Seunghee Lee

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2310/08

Abstract: A stage of a gate driver includes: a first node controller and a second node controller. The first node controller includes a first control transistor connected between a first node and a second node, and the first control transistor includes a first gate and a second gate that are connected to a first voltage input terminal for receiving a first voltage of an on-voltage level. The second node controller includes a second control transistor connected between a third node and a second voltage input terminal for receiving a second voltage of an off-voltage level, and the second control transistor includes a first gate connected to the first node and a second gate connected to the second voltage input terminal.

公开(公告)号：US20230140806A1

公开(公告)日：2023-05-04

申请号：US17748926

申请日：2022-05-19

Applicant: Samsung Display Co., Ltd.

Inventor： Haijung In ,  Chulkyu Kang ,  Soongi Kwon ,  Minjeong Kim ,  Kimyeong Eom

IPC: G09G3/3258

Abstract: A driver includes a stage that includes a first controller, a second controller, and a first output unit. The first controller controls a voltage level of a first node. The second controller controls voltage levels of a second node and a third node to be equal to the voltage level of a first node or an opposite voltage level of the voltage level of the first node, and controls a voltage level of a fifth node to be equal to the opposite voltage level of the voltage level of the first node. The first output unit may output a gate control signal, which has a first voltage when the second node and the third node is in an on-voltage level state, and has a second voltage when the fifth node is in an on-voltage level state.

公开(公告)号：US11302255B2

公开(公告)日：2022-04-12

申请号：US17078051

申请日：2020-10-22

Applicant: Samsung Display Co., Ltd.

Inventor： Haijung In

IPC: G09G3/3258 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/32 ,  H01L49/02

Abstract: A display apparatus includes: a substrate having a display area and a non-display area; a plurality of gate lines extending in a first direction disposed on the display area of the substrate; and a driver disposed on the non-display area, the driver including: a plurality of stages connected to the plurality of gate lines; a first voltage line and a second voltage line that are connected to the plurality of stages to respectively supply a first direct current (DC) voltage and a second DC voltage to the plurality of stages; and at least one capacitor connected to at least one of the plurality of stages, the at least one capacitor including a pair of electrodes, wherein one of the electrodes is electrically connected to one of the first voltage line and the second voltage line.

公开(公告)号：US09697768B2

公开(公告)日：2017-07-04

申请号：US14747315

申请日：2015-06-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Haijung In ,  Boyong Chung

IPC: G09G3/32 ,  G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2300/0866 ,  G09G2310/0218 ,  G09G2310/0251 ,  G09G2310/0256 ,  G09G2320/0238

Abstract: A display apparatus includes a plurality of pixel circuits, each outputting a driving current to an output node connected to an organic light-emitting diode based on a data signal. Each pixel circuit sequentially operate in an anode initialization period, a threshold voltage compensation period, a data write period, and an emission period. The pixel circuits are arranged in in multiple rows and multiple columns, and each pixel circuit includes an anode initialization transistor to output an initialization voltage to the output node based on a first control signal. A first control line connected to the anode initialization transistor of a pixel circuit in an odd row is different from the first control line connected to the anode initialization transistor of a pixel circuit in an even row.