Abstract:
A gate drive semiconductor device includes: external terminals to which PWM control signals are supplied; external terminals outputting a drive signal for driving a three-phase BLDC motor; external terminals to which the counter electromotive voltage generated by driving the three-phase BLDC motor is supplied; a zero-cross determination unit generating an interrupt signal indicating timing at which the counter electromotive voltage intersects with a midpoint potential of the three-phase BLDC motor based on the PWM control signal and the counter electromotive voltage; and an external terminal outputting the interrupt signal.
Abstract:
Motor Drive Control Device configured to properly start up various types of motors under operating conditions where motor operations are performed in a wide range of temperature and power supply voltage, includes output drive controllers that supply PWM drive output signals to an output pre-driver in such a manner as to minimize the error between a current instruction signal and a current detection digital signal. In response to a detected induced voltage generated from a voltage detector upon startup of a motor, an initial acceleration controller supplies initial acceleration output signals specifying a conducting phase for initial acceleration of the motor to the output drive controllers. The initial acceleration controller, the output drive controllers, and an output driver make a conducting phase change and perform a PWM drive to provide the initial acceleration of the motor.
Abstract:
A motor driving device and a motor system that can reduce a torque ripple of a motor are provided. The current control loop detects a drive current of the motor, detects an error between the detected value of the drive current and a current indication value as a target value of the drive current, and determines the duty of the PWM signal reflecting the error concerned. The back EMF phase detector detects the phase of a back electromotive force of each phase in the motor. The torque correction unit calculates a first torque correction coefficient of a periodic function based on the phase variations in the three phases of the back electromotive force, and corrects the current indication value superimposing the first torque correction coefficient on the current indication value.
Abstract:
The phase of a drive current of a motor is optimized. The phase arithmetic unit PHCAL calculates a drive voltage phase θdrv to converge the phase difference between the reference voltage phase θbemf and the reference current phase θi to zero based on a prescribed arithmetic expression. The phase correction unit PHCP determines the phase θdrvR after the correction by adding a correction value to the phase θdrv, and the magnitude of the correction value is updated by a feedback control so as to converge to a prescribed value the phase difference between the reference voltage phase θbemf and the reference current phase θi which are inputted. A PWM controller shifts an energization control timing synchronized with the reference voltage phase θbemf based on the corrected phase θdrvR, and generates the PWM signal for controlling the drive voltage to a sine wave shape.
Abstract:
The present invention is intended to reduce noise and vibration of a motor. A first duty correction circuit generates a first corrected duty instruction value which changes with an increment same as an increment of a duty instruction value and in which an offset value as a constant is reflected. A second duty correction circuit generates a second corrected duty instruction value which changes with an increment different from an increment of the duty instruction value. A selector outputs, as the corrected duty instruction value, either one of the first corrected duty instruction value and the second corrected duty instruction value in accordance with a magnitude relation between the duty instruction value and a duty reference value.
Abstract:
A motor driver controller including a difference control section; a driver output section; a drive current detection amplifier; and a load short-circuit detection circuit. A motor and sensing resistor is coupled in series and coupled to an output terminal of the driver output section. The difference control section generates a drive voltage command signal in response to a drive current command value and a drive current detection signal. The driver output section drives the motor and sensing resistor, in response to the drive voltage command signal, and a drive current detection amplifier generates a signal fed to the difference control section, in response to a drive current of the sensing resistor. The load short-circuit detection circuit detects an abnormal oscillation waveform signal caused by a short-circuit state between the both ends of the motor.
Abstract:
The present invention realizes a calibration operation for detecting a motor speed, without employing digital correcting by an external CPU. The calibration operation calculates a comparison reference value corresponding to aback EMF detection signal of a back EMF detector circuit when a zero current flows through a motor and when an arm is fixed. Accordingly, the back EMF detection signal of the back EMF detector circuit is set as the first value and the second value responding to the non-zero current flowing through the motor, and the semiconductor integrated circuit calculates the comparison reference value from the first value and the second value. The difference between the comparison reference value and the comparison input value as the back EMF detection signal of the back EMF detector circuit is reduced by adjusting the gain of an internal amplifier of the back EMF detector circuit by an adjustment unit.