公开(公告)号：US20240429887A1

公开(公告)日：2024-12-26

申请号：US18339111

申请日：2023-06-21

Applicant: QUALCOMM Incorporated

Inventor： Chieh-Yu HSIEH ,  Behnam SEDIGHI

IPC: H03F3/45

Abstract: Certain aspects of the present disclosure generally relate to electronic circuits and, more particularly, to an operational transconductance amplifier (OTA). One example amplifier generally includes: a first pair of input transistors; a first pair of cascode transistors coupled in cascode with the first pair of input transistors, respectively; a second pair of input transistors; a second pair of cascode transistors coupled in cascode with the second pair of input transistors, respectively; and a third pair of input transistors coupled to the second pair of cascode transistors, respectively.

公开(公告)号：US20240097694A1

公开(公告)日：2024-03-21

申请号：US17932572

申请日：2022-09-15

Applicant: QUALCOMM Incorporated

Inventor： Behnam SEDIGHI

IPC: H03M1/12 ,  H03M1/46

CPC classification number: H03M1/1265 ,  H03M1/466

Abstract: Techniques and apparatus for alias rejection in analog-to-digital converters (ADCs), in which only a portion of the ADC is operated at a higher sampling rate than other portions of the ADC, thereby preventing aliasing, but saving power. One example ADC circuit generally includes a first circuit portion configured to operate at a first clock rate equal to a sampling rate of the ADC circuit; and a second circuit portion configured to operate at a second clock rate higher than the sampling rate of the ADC circuit.

公开(公告)号：US20230387929A1

公开(公告)日：2023-11-30

申请号：US17804779

申请日：2022-05-31

Applicant: QUALCOMM Incorporated

Inventor： Behnam SEDIGHI ,  Shi BU ,  Elias DAGHER ,  Dinesh Jagannath ALLADI

IPC: H03M1/08

CPC classification number: H03M1/0854

Abstract: Methods and apparatus for noise shaping in multi-stage analog-to-digital converters (ADCs). An example ADC generally includes a first conversion stage having a residue output; an amplifier having an input selectively coupled to the residue output of the first conversion stage; a second conversion stage having an input selectively coupled to an output of the amplifier; and a switched-capacitor network having a first port coupled to the input of the amplifier and having a second port coupled to the input of the second conversion stage, the switched-capacitor network being configured to provide a second-order or higher noise transfer function for noise shaping of quantization noise of the second conversion stage.