公开(公告)号：US20140198588A1

公开(公告)日：2014-07-17

申请号：US13742964

申请日：2013-01-16

Applicant: QUALCOMM Incorporated

Inventor： Esin Terzioglu ,  Gregory Ameriada Uvieghara ,  Sei Seung Yoon ,  Balachander Ganesan ,  Anil Chowdary Kota

IPC: H03K17/22 ,  G11C7/12

CPC classification number: H03K17/223 ,  G11C7/00 ,  G11C7/12 ,  G11C8/08 ,  G11C13/0069 ,  G11C17/18 ,  H03K17/08104 ,  H03K17/6872 ,  H03K19/00315 ,  H03K2217/0018 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: A dual-mode PMOS transistor is disclosed that has a first mode of operation in which a switched n-well for the dual-mode PMOS transistor is biased to a high voltage. The dual-mode PMOS transistor has a second mode of operation in which the switched n-well is biased to a low voltage that is lower than the high voltage. The dual-mode PMOS transistor has a size and gate-oxide thickness each having a magnitude that cannot accommodate a permanent tie to the high voltage. An n-well voltage switching circuit biases the switched n-well to prevent voltage damage to the dual-mode PMOS transistor despite its relatively small size and thin gate-oxide thickness.