知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

53 records (took 0.025 seconds)

    Systems and methods for handling silence in audio streams
    12.
    发明授权
    Systems and methods for handling silence in audio streams 有权

    公开(公告)号：US09913031B2

    公开(公告)日：2018-03-06

    申请号：US15087208

    申请日：2016-03-31

    Applicant: QUALCOMM Incorporated

    Inventor： Lior Amarilio ,  Amit Gil ,  Oded Schnitzer

    IPC: H04R29/00 ,  H04R3/00 ,  H03G3/34

    Abstract: Systems and methods for handling silence in audio streams are disclosed. In one aspect, a transmitter detects a halt in an audio stream. After detection of the halt in the audio stream, the transmitter embeds a silence signal into the audio stream and transmits the silence signal to associated receivers. The associated receivers may respond to the embedded silence signal by “playing” silence or by using the silence signal to activate a silence protocol. In either event, the associated receivers do not receive the original audio halt and do not produce an unwanted audio artifact.

    COHERENCY DRIVEN ENHANCEMENTS TO A PERIPHERAL COMPONENT INTERCONNECT (PCI) EXPRESS (PCIe) TRANSACTION LAYER
    14.
    发明申请
    COHERENCY DRIVEN ENHANCEMENTS TO A PERIPHERAL COMPONENT INTERCONNECT (PCI) EXPRESS (PCIe) TRANSACTION LAYER 审中-公开
    外围组件互连（PCI）EXPRESS（PCIe）交易层的协同驱动增强

    公开(公告)号：US20160371222A1

    公开(公告)日：2016-12-22

    申请号：US15184181

    申请日：2016-06-16

    Applicant: QUALCOMM Incorporated

    Inventor： Shaul Yohai Yifrach ,  Amit Gil ,  James Lionel Panian ,  Ofer Rosenberg

    IPC: G06F13/42 ,  G06F13/40 ,  G06F12/08

    CPC classification number: G06F13/4282 ,  G06F12/0828 ,  G06F12/1441 ,  G06F13/4022 ,  G06F15/167 ,  G06F21/00 ,  G06F2212/621 ,  G06F2213/0026

    Abstract: Coherency driven enhancements to a PCIe transaction layer are disclosed. In an exemplary aspect, a coherency agent is added to a PCIe system to support a relaxed consistency model for use of memory therein. In particular, endpoints can request ownership of portions of the memory to read from and write to the memory. The coherency agent assigns an address range including the requested portions. The requesting endpoint copies the contents of the memory corresponding to the assigned address range into local endpoint memory to perform read and write operations locally. The owning endpoint may provide an updated snapshot of the copied memory contents upon request. At completion of use of the copied memory contents, or upon request from the coherency agent, ownership of the address range reverts back to the root complex, and the endpoint sends the updated contents back to the address range in the system memory element.

    Abstract translation: 公开了对PCIe事务层的一致性驱动增强。 在示例性方面，将一致性代理添加到PCIe系统以支持用于其中的存储器的松弛一致性模型。 特别地，端点可以请求存储器的部分的所有权从存储器读取和写入存储器。 一致性代理分配包括所请求部分的地址范围。 请求端点将对应于分配的地址范围的内存的内容复制到本地端点存储器中，以在本地执行读写操作。 所拥有的端点可以根据请求提供复制的存储器内容的更新的快照。 在完成使用复制的存储器内容时，或者根据来自一致性代理的请求，地址范围的所有权返回到根复合体，并且端点将更新的内容发送回系统存储器元件中的地址范围。

    COMMUNICATING TRANSACTION-SPECIFIC ATTRIBUTES IN A PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) SYSTEM
    15.
    发明申请
    COMMUNICATING TRANSACTION-SPECIFIC ATTRIBUTES IN A PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) SYSTEM 审中-公开
    在外围组件互连显式（PCIE）系统中交流交互特定属性

    公开(公告)号：US20160371221A1

    公开(公告)日：2016-12-22

    申请号：US15168574

    申请日：2016-05-31

    Applicant: QUALCOMM Incorporated

    Inventor： Ofer Rosenberg ,  Amit Gil ,  James Lionel Panian ,  Piyush Patel ,  Shaul Yohai Yifrach

    IPC: G06F13/42 ,  G06F13/40 ,  G06F13/16

    CPC classification number: G06F13/4282 ,  G06F13/1673 ,  G06F13/4022 ,  G06F2213/0026

    Abstract: Communicating transaction-specific attributes in a peripheral component interconnect express (PCIe) system is disclosed. A PCIe system includes a host system and at least one PCIe endpoint. The PCIe endpoint is configured to determine one or more transaction-specific attributes that can improve efficiency and performance of a predefined host transaction. In this regard, in one aspect, the PCIe endpoint encodes the transaction-specific attributes in a transaction layer packet (TLP) prefix of at least one PCIe TLP and provides the PCIe TLP to the host system. In another aspect, a PCIe root complex (RC) in the host system is configured to detect and extract the transaction-specific attributes from the TLP prefix of the PCIe TLP received from the PCIe endpoint. By communicating the transaction-specific attributes in the TLP prefix of the PCIe TLP, it is possible to improve efficiency and performance of the PCIe system without violating the existing PCIe standard.

    Abstract translation: 披露外围组件互连快递（PCIe）系统中的交易特定属性的通信。 PCIe系统包括主机系统和至少一个PCIe端点。 PCIe端点配置为确定可以提高预定义主机事务的效率和性能的一个或多个特定于事务的属性。 在这方面，在一方面，PCIe端点对至少一个PCIe TLP的事务层分组（TLP）前缀中的事务特定属性进行编码，并将PCIe TLP提供给主机系统。 在另一方面，主机系统中的PCIe根复合体（RC）被配置为从PCIe端点接收的PCIe TLP的TLP前缀中检测并提取特定于事务的属性。 通过传递PCIe TLP的TLP前缀中的特定于交易的属性，可以在不违反现有PCIe标准的情况下提高PCIe系统的效率和性能。

    DYNAMIC LANE REALLOCATION BASED ON BANDWIDTH NEEDS
    16.
    发明公开
    DYNAMIC LANE REALLOCATION BASED ON BANDWIDTH NEEDS 审中-公开

    公开(公告)号：US20240146005A1

    公开(公告)日：2024-05-02

    申请号：US18050852

    申请日：2022-10-28

    Applicant: QUALCOMM Incorporated

    Inventor： Adi Menachem ,  Lalan Jee Mishra ,  Amit Gil

    IPC: H01R24/20 ,  H01R24/60

    CPC classification number: H01R24/20 ,  H01R24/60 ,  H01R2107/00

    Abstract: Systems and methods for dynamic lane reallocation based on bandwidth needs are disclosed. In one aspect, dynamic repurposing of low-speed lanes for creation of a high-speed lane on a communication bus is disclosed. The repurposed low-speed lanes may be used to support a symmetrical high-speed link or an asymmetrical high-speed link. Further changes are provided to shield conductors in a cable to assist in preventing crosstalk or unwanted electromagnetic emissions. The addition of such a dynamic high-speed lane may assist in data transfer for data intensive use cases.

    Function-specific communication on a multi-drop bus for coexistence management
    18.
    发明授权
    Function-specific communication on a multi-drop bus for coexistence management 有权

    公开(公告)号：US10572410B2

    公开(公告)日：2020-02-25

    申请号：US16193853

    申请日：2018-11-16

    Applicant: QUALCOMM Incorporated

    Inventor： Helena Deirdre O'Shea ,  Lalan Jee Mishra ,  Richard Dominic Wietfeldt ,  Mohit Kishore Prasad ,  Amit Gil ,  Gary Chang

    IPC: G06F13/42 ,  G06F13/20

    Abstract: Systems, methods, and apparatus are described that provide for communicating coexistence messages over a multi-drop serial bus. A data communication method includes configuring a common memory map at each of a plurality of devices coupled to a serial bus, receiving at a first device coupled to the serial bus, first coexistence information directed to a second device coupled to the serial bus, generating at the first device, a coexistence message that includes the first coexistence information, and transmitting the coexistence message to the second device over the serial bus. The first coexistence information in the coexistence message may be addressed to a location in the common memory map calculated based on a destination address associated with the first coexistence information and a unique identifier of the first device.

    Systems and methods for handling silence in audio streams
    19.
    发明授权
    Systems and methods for handling silence in audio streams 有权

    公开(公告)号：US10419852B2

    公开(公告)日：2019-09-17

    申请号：US15894401

    申请日：2018-02-12

    Applicant: QUALCOMM Incorporated

    Inventor： Lior Amarilio ,  Amit Gil ,  Oded Schnitzer

    IPC: H04R3/00 ,  G10L19/012 ,  G06F3/16 ,  H03G3/34 ,  G10L19/16 ,  G06F13/38

    Abstract: Systems and methods for handling silence in audio streams are disclosed. In one aspect, a transmitter detects a halt in an audio stream. After detection of the halt in the audio stream, the transmitter embeds a silence signal into the audio stream and transmits the silence signal to associated receivers. The associated receivers may respond to the embedded silence signal by “playing” silence or by using the silence signal to activate a silence protocol. In either event, the associated receivers do not receive the original audio halt and do not produce an unwanted audio artifact.

    Universal serial bus (USB) host and client devices for supporting scheduled low-power operations
    20.
    发明授权
    Universal serial bus (USB) host and client devices for supporting scheduled low-power operations 有权

    公开(公告)号：US10261569B2

    公开(公告)日：2019-04-16

    申请号：US14702175

    申请日：2015-05-01

    Applicant: QUALCOMM Incorporated

    Inventor： Nir Gerber ,  Lior Amarilio ,  Amit Gil

    IPC: G06F1/32 ,  G06F1/26 ,  G06F1/3234 ,  G06F13/38

    Abstract: Aspects disclosed in the detailed description include scheduled universal serial bus (USB) low-power operations. In this regard, in one aspect, a USB host controller determines a low-power operation schedule for a USB client device. The low-power operation schedule comprises one or more scheduled low-power operation periods, each corresponding to a respective entry time and a respective exit time. The USB host controller communicates the low-power operation schedule to the USB client device using one or more USB standard packets. By scheduling the one or more scheduled low-power operation periods with respective entry and exit times, the USB host controller or the USB client controller is able to start and end the one or more scheduled low-power operation periods without incurring additional signaling, thus improving efficiency of the USB low-power operation. Further, by communicating the low-power operation schedule using USB standard packets, it is possible to preserve compatibility with USB standards.

Patent Agency Ranking