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公开(公告)号:US20070195946A1
公开(公告)日:2007-08-23
申请号:US11442152
申请日:2006-05-30
Applicant: Kazufumi Komura , Takayoshi Nakamura , Keiichi Fujimura , Masahito Hirose , Keigo Nakashima , Masaki Nagato
Inventor: Kazufumi Komura , Takayoshi Nakamura , Keiichi Fujimura , Masahito Hirose , Keigo Nakashima , Masaki Nagato
IPC: H04M3/00
CPC classification number: H01L23/5223 , H01L23/5286 , H01L2924/0002 , Y10S257/908 , H01L2924/00
Abstract: A semiconductor integrated circuit device provided with a plurality of power supply wire layers including a first potential power supply wire and a second potential power supply wire formed in different layers. At least one capacitor contact wire extends from one of the first and second potential power supply wires toward the other one of the first and second potential power supply wires so as to form a capacitor between each capacitor contact wire and its surrounding wires.
Abstract translation: 一种半导体集成电路装置,具备包括形成在不同层中的第一潜在电源线和第二潜在电源线的多个电源线层。 至少一个电容器接触线从第一和第二电势电源线中的一个延伸到第一和第二电势电源线中的另一个,以便在每个电容器接触线和其周围的线之间形成电容器。
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12.
公开(公告)号:US5724734A
公开(公告)日:1998-03-10
申请号:US561845
申请日:1995-11-22
Applicant: Masahito Hirose , Kazufumi Nakamura
Inventor: Masahito Hirose , Kazufumi Nakamura
CPC classification number: F01L1/143 , B22F3/16 , F01L2103/00 , Y10T29/49298 , Y10T29/49304
Abstract: To manufacture a tappet in an internal combustion engine, a tappet rough body which comprises a cylindrical portion with an upper wall and an annular side wall is moulded by press processing of metal powder, such that the upper wall, the cylindrical portion and the annular side wall become larger than the tappet to be manufactured in the axial size. After sintering the tappet rough body, it is re-compressed to form the final tappet.
Abstract translation: 为了在内燃机中制造挺杆,通过金属粉末的冲压加工来模制包括具有上壁和圆环形侧壁的圆柱形部分的挺杆体,使得上壁,圆柱形部分和环形侧 壁变得大于以轴向尺寸制造的挺杆。 在挺挺挺体后,重新压缩,形成最后的挺杆。
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公开(公告)号:US20060220722A1
公开(公告)日:2006-10-05
申请号:US11220676
申请日:2005-09-08
Applicant: Kazufumi Komura , Takayoshi Nakamura , Keiichi Fujimura , Masahito Hirose , Keigo Nakashima , Masaki Nagato
Inventor: Kazufumi Komura , Takayoshi Nakamura , Keiichi Fujimura , Masahito Hirose , Keigo Nakashima , Masaki Nagato
IPC: G06F1/04
CPC classification number: G06F1/32 , G06F1/10 , G06F1/3237 , G06F1/3287 , Y02D10/128 , Y02D10/171
Abstract: A power consumption reduction circuit for reducing power consumed by a clock tree network including a transmission control circuit. The power consumption reduction circuit includes a transmission control circuit for controlling transmission of the clock signal to the buffer circuit group so as to selectively provide and interrupt the clock signal. A switch circuit disconnects the buffer circuit group from a power supply when the transmission control circuit interrupts the clock signal.
Abstract translation: 一种用于减少由包括传输控制电路的时钟树网络消耗的功率的功耗降低电路。 功耗降低电路包括用于控制时钟信号传输到缓冲电路组的传输控制电路,以选择性地提供和中断时钟信号。 当传输控制电路中断时钟信号时,开关电路将缓冲电路组与电源断开。
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