公开(公告)号：US08773809B2

公开(公告)日：2014-07-08

申请号：US13690435

申请日：2012-11-30

Applicant: LSI Corporation

Inventor： Ming Jin ,  Erich F. Haratsch ,  Jason S. Goldberg ,  Kurt J. Worrell ,  Scott M. Dziak ,  Jeffrey P. Grundvig

IPC: G11B21/02

CPC classification number: G11B27/36 ,  G11B5/6076 ,  G11B2220/2516

Abstract: A contact event between a sensing device and a storage medium is detected by receiving a signal indicating a physical proximity between the sensing device and the storage medium; generating a plurality of frequency bin outputs; comparing one or more frequency bin outputs to a corresponding first level threshold to yield a corresponding comparator output; summing the comparator output with at least one prior instance of the comparator output to yield an aggregated value; comparing the aggregated value to an aggregate threshold to yield an aggregate output; and generating a contact event output if one or more of a first group of the plurality of frequency bin outputs has an associated aggregate output set to a predefined binary value and a predefined minimum number of a second group of the plurality of frequency bin outputs has an associated aggregate output set to a predefined binary value.

Abstract translation: 通过接收指示感测装置和存储介质之间的物理接近的信号来检测感测装置和存储介质之间的接触事件; 产生多个频率仓输出; 将一个或多个频率仓输出与相应的第一电平阈值进行比较以产生相应的比较器输出; 将比较器输出与比较器输出的至少一个先前实例相加以产生聚合值; 将聚合值与聚合阈值进行比较以产生总产出; 以及如果所述多个频率仓输出中的第一组中的一个或多个具有设置为预定二进制值的相关联的聚合输出并且所述多个频率仓输出中的第二组的预定最小数量具有 关联的聚合输出设置为预定义的二进制值。

公开(公告)号：US09001446B1

公开(公告)日：2015-04-07

申请号：US14194069

申请日：2014-02-28

Applicant: LSI Corporation

Inventor： Bruce A. Wilson ,  Richard Rauschmayer ,  Peter J. Windler ,  Jefferson E. Singleton ,  Shaohua Yang ,  Jeffrey P. Grundvig

IPC: G11B5/09 ,  G11B5/596 ,  G11B20/10

CPC classification number: G11B5/59616 ,  G11B5/09 ,  G11B19/00 ,  G11B20/10037 ,  G11B2005/0008

Abstract: A system and method for power management in a hard disk drive (HDD) assembly incorporating two or more read sensors includes directing a read/write head to follow a track; depowering one or more read sensors and readpath circuits associated with the read sensors; reading an analog readback signal through the first read sensor; processing the signal through an analog front-end to generate an input signal; sampling the input signal through an analog to digital converter at a first frequency to generate a first sampling signal; sampling the input signal through a second analog to digital converter at a second frequency to generate a second sampling signal; and generating a digital output signal from either or both sampling signals at a third sampling frequency through a digital signal processor. The method may additionally comprise adjusting a sampling frequency when power level reaches a threshold.

Abstract translation: 包含两个或更多个读取传感器的硬盘驱动器（HDD）组件中的电源管理的系统和方法包括引导读/写头跟随轨道; 降低与读取的传感器相关联的一个或多个读取传感器和读取路径电路; 通过第一个读取传感器读取模拟回读信号; 通过模拟前端处理信号以产生输入信号; 以第一频率通过模数转换器对输入信号进行采样，以产生第一采样信号; 以第二频率通过第二模数转换器对输入信号进行采样，以产生第二采样信号; 以及通过数字信号处理器以第三采样频率从一个或两个采样信号产生数字输出信号。 该方法还可以包括当功率电平达到阈值时调整采样频率。

公开(公告)号：US08693125B1

公开(公告)日：2014-04-08

申请号：US13743411

申请日：2013-01-17

Applicant: LSI Corporation

Inventor： Jeffrey P. Grundvig

IPC: G11B5/09

CPC classification number: G11B20/10222

Abstract: A clock phase measurement circuit comprises a selector circuit operable to inject one of a first analog clock signal or a second analog clock signal into a signal path configured to carry an analog data signal, so that the injected analog clock signal replaces the data signal. An Analog to Digital Converter (ADC) converts the injected analog clock signal to a digital clock signal. A counter selects a time, using the second analog clock signal, to determine at least one of a phase or a magnitude of the digital clock signal. A measurement circuit determines at least one of the phase or the magnitude of the digital clock signal for at least one frequency at the selected time.

Abstract translation: 时钟相位测量电路包括选择器电路，其可操作以将第一模拟时钟信号或第二模拟时钟信号之一注入到被配置为携带模拟数据信号的信号路径中，使得注入的模拟时钟信号取代数据信号。 模数转换器（ADC）将注入的模拟时钟信号转换为数字时钟信号。 计数器使用第二模拟时钟信号选择时间来确定数字时钟信号的相位或幅度中的至少一个。 测量电路在所选择的时间确定至少一个频率的数字时钟信号的相位或幅度中的至少一个。