公开(公告)号：US20230350797A1

公开(公告)日：2023-11-02

申请号：US17819347

申请日：2022-08-12

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： JohnDongjun KIM ,  Jiho KIM ,  Myoungsoo JUNG

IPC: G06F12/02 ,  G06F11/07

CPC classification number: G06F12/0246 ,  G06F11/0793 ,  G06F11/073 ,  G06F2212/7208

Abstract: A flash memory device of a flash-based storage device includes a plurality of flash buses and a plurality of flash memory chips, and each flash bus is connected to two or more flash memory chips among the flash memory chips. A front-end includes a processing core, and a plurality of flash controllers are respectively connected to the flash buses. Each flash controller includes a flash controller logic configured to perform a read operation or a write operation in a flash memory chip connected to a corresponding flash bus among the flash buses, and a router configured to perform communication with another flash controller among the flash controllers.

公开(公告)号：US20210406170A1

公开(公告)日：2021-12-30

申请号：US17304030

申请日：2021-06-14

Applicant: MemRay Corporation ,  Korea Advanced Institute of Science and Technology

Inventor： Myoungsoo JUNG ,  Jie ZHANG

IPC: G06F12/02 ,  G06F12/1045 ,  G06F12/0882 ,  G06F12/0862

Abstract: A processor corresponding to a core of a coprocessor, a cache used as a buffer of the processor, and a flash controller are connected to an interconnect network. The flash controller and a flash memory are connected to a flash network. The flash controller reads or writes target data of a memory request from or to the flash memory.