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公开(公告)号：US20130099588A1
公开(公告)日：2013-04-25
申请号：US13656142
申请日：2012-10-19
Inventor： Sung-Ku YEO , Gyu-Hyeong Cho , Se-Ki Kim , Yu-Su Kim , Se-Ho Park , Jun-Han Choi
IPC: H02J17/00
CPC classification number: H02J50/12 , H02J7/025 , H02J50/10 , H02J50/80 , H02M7/2176
Abstract: A wireless power receiver for wirelessly receiving power from a wireless power supplier includes a power receiver for receiving wireless power from the wireless power supplier and storing the wireless power for a first time period, a rectifier connected to the power receiver for rectifying the wireless power, a power adjuster connected to the rectifier and an output end, for adjusting a magnitude of the wireless power by enabling the power receiver to store the wireless power for the first time period and delivering the wireless power to the output end for a second time period, and a controller for determining the first and second time periods.
Abstract translation: 用于从无线电力供应器无线接收电力的无线电力接收器包括：电力接收器，用于从无线电力供应器接收无线电力并且在第一时间段内存储无线电力，整流器连接到电力接收器以整流无线电力; 连接到整流器的电力调节器和输出端，用于通过使得电力接收器能够在第一时间段内存储无线电力并将无线电力传送到输出端第二时间段来调整无线功率的大小， 以及用于确定第一和第二时间段的控制器。
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Patent Agency Ranking
公开(公告)号：US11329557B2
公开(公告)日：2022-05-10
申请号：US16553405
申请日：2019-08-28
Inventor： Seungchul Jung , Kye-Seok Yoon , Gyu-Hyeong Cho , Sang Joon Kim , Sang Jin Lim
Abstract: A single-inductor multiple-output (SIMO) converter includes a converter configured to provide respective voltages of a plurality of channels with a single inductor and a control logic configured to control switches of the converter based on clocks corresponding to the plurality of channels, wherein the control logic is configured to compare an output voltage of a selected channel of the plurality of channels that corresponds to a control target to a reference voltage of the selected channel based on a clock of the selected channel and operate in one of a first mode that adaptively adjusts a number of times that a pulse triggering a power transfer to the channel is generated, and a second mode that blocks a generation of the pulse.
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公开(公告)号：US11038480B2
公开(公告)日：2021-06-15
申请号：US16791728
申请日：2020-02-14
Inventor： Hyeokki Hong , Ji-Hun Lee , Gyu-Hyeong Cho , Cheheung Kim , Hyunwook Kang
Abstract: An amplifier includes: a first input transistor connected to a first input, a first output, and a power source or a ground, a second input transistor connected to a second input, a second output, and the power source or the ground; a first replica transistor connected to the first input, a detection node, and the power source or the ground; a second replica transistor connected to the second input, the detection node, and the power source or the ground; and a bias transistor connected to a bias voltage, the detection node, and the power source or the ground.
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公开(公告)号：US09875693B2
公开(公告)日：2018-01-23
申请号：US14983512
申请日：2015-12-29
Inventor： Oh-Jo Kwon , Ji-Woong Kim , Choong-Sun Shin , Joo-Hyung Lee , Jun-Suk Bang , Gyu-Hyeong Cho
IPC: G09G5/00 , G09G3/3283 , G09G3/3233 , G09G3/20
CPC classification number: G09G3/3283 , G09G3/2007 , G09G3/3233 , G09G3/3291 , G09G2310/027 , G09G2310/0272 , G09G2310/0291 , G09G2310/0294 , G09G2320/0295 , G09G2320/045 , G09G2330/021
Abstract: A data driver includes a data signal converter to convert image data to a data signal, an output buffer to output the data signal to a data line, a first cascode circuit connected to the output buffer and including a plurality of transistors, a first noise attenuator connected to a first node between the output buffer and the first cascode circuit, and to attenuate a first current noise, a second cascode circuit connected to the output buffer and including a plurality of transistors, a second noise attenuator connected a second node between the output buffer and the second cascode circuit, and to attenuate a second current noise, a current integrator to generate an integrated voltage by integrating a first current flowing through the first cascode circuit and a second current flowing through the second cascade circuit, and an analog-digital converter (ADC) to convert the integrated voltage to a digital signal.
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15.发明申请公开(公告)号：US20170149403A1
公开(公告)日：2017-05-25
申请号：US15345926
申请日：2016-11-08
Inventor： Gyu-Hyeong Cho , Ji-Hun Lee
CPC classification number: H04R3/007 , H03F3/183 , H03F3/2173 , H03F3/45192 , H03F3/4565 , H03F2200/03 , H03F2200/351 , H03F2200/421 , H03F2200/555 , H03F2200/78 , H03G3/3005 , H03G3/3089
Abstract: A class-D amplifier includes an error amplification circuit, a duty signal generator, a level selection circuit, a driver and control block and an output stage. The class-D amplifier divides peal levels of an error signal into multi-level and changes a scheme for modulating the error signal when the error signal crosses each level boundary of the multi-level thereby to have an effect such as the error signal is folded. Therefore, the class-D amplifier drives output nodes with multi-level and thus the class-D amplifier may increasing efficiency while reducing EMI.
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公开(公告)号：US20140106826A1
公开(公告)日：2014-04-17
申请号：US14054088
申请日：2013-10-15
Inventor： Sung-Ku YEO , Gyu-Hyeong Cho , Se-Ho Park , Jun-Han Choi
IPC: H02J7/02
Abstract: A wireless electric power receiver for receiving wireless electric power from a wireless electric transmitter is provided. The wireless electric power receiver includes an electric power receiving unit that receives wireless electric power from the wireless electric power transmitter; a rectifying unit that rectifies wireless electric power in the form of alternating current output from the wireless electric power receiving unit and outputs rectified electric power; and an electric power regulation unit that receives an input of the rectified electric power, outputs first electric power which has a lower value of a first voltage than that of the rectified electric power for a first period, and does not output electric power for a second period, so as to output electric power with a predetermined voltage value.
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