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公开(公告)号：US11095383B2
公开(公告)日：2021-08-17
申请号：US16455721
申请日：2019-06-27
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Jinhui Wang , Chuan Xu
Abstract: A method for exchanging a clock synchronization packet performed by a network apparatus, including: exchanging a clock synchronization packet with a first clock source, where the network apparatus includes a boundary clock; determining a first time deviation of the boundary clock relative to the first clock source according to the clock synchronization packet exchanged with the first clock source, where the boundary clock avoids performing an operation of calibrating a time of a local clock of the boundary clock according to the first time deviation; and sending a clock synchronization packet to a first slave clock of the boundary clock, where the clock synchronization packet includes a first timestamp, a value of the first timestamp is equal to a first corrected value, and the first corrected value is a value obtained by the boundary clock by correcting the time of the local clock by using the first time deviation.
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公开(公告)号：US20190158204A1
公开(公告)日：2019-05-23
申请号：US16259142
申请日：2019-01-28
Applicant: Huawei Technologies Co., Ltd.
Inventor： Junfeng Luo , Jinhui Wang , Zhu Cheng , Feng Wu
Abstract: A time synchronization method and a device, where the method includes generating, by a first device, a first time synchronization frame according to a first coding scheme, where the first time synchronization frame includes a first frame header and a first time of day (TOD), the first frame header carries an identifier of the first coding scheme, and the first coding scheme defines a boundary of the first time synchronization frame and a location of the first TOD in the first time synchronization frame, and sending, by the first device, the first time synchronization frame to a second device using a first single line to trigger the second device to identify the first time synchronization frame according to the identifier of the first coding scheme, to obtain the first TOD from the first time synchronization frame, and to trace a time of the first device according to the first TOD.
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公开(公告)号：US20190007191A1
公开(公告)日：2019-01-03
申请号：US16107300
申请日：2018-08-21
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinhui Wang
Abstract: A device and a method for supporting clock transfer of multiple clock domains, where the device includes N phase frequency detectors, N filters, N clock reconstructors, and N clock domain interfaces, where N is an integer greater than or equal to two, the N clock domain interfaces are in a one-to-one correspondence with the N phase frequency detectors, the N filters, and the N clock reconstructors, the N phase frequency detectors are respectively connected to N clock sources, and at least two clock sources of the N clock sources are different. The foregoing device flexibly adapt to multiple different clock domains, implement that a single device simultaneously supports clock transfer of multiple clock domains, and flexibly satisfy user demands without adding or replacing devices.
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公开(公告)号：US20240097641A1
公开(公告)日：2024-03-21
申请号：US18515999
申请日：2023-11-21
Applicant: Huawei Technologies Co., Ltd.
Inventor： Wei Wu , Hao Li , Jinhui Wang , Wei Li
CPC classification number: H03H9/02015 , H03H3/02 , H03H9/02047
Abstract: A resonator includes a resonance layer, a substrate, and a barrier layer. The barrier layer is located on the substrate, and the barrier layer and the substrate form a cavity. The cavity is configured to accommodate the resonance layer. The barrier layer includes a top wall and a side wall, and an inner surface of the side wall surrounds the resonance layer. An outer surface of the side wall includes a groove, and the groove surrounds the side wall.
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公开(公告)号：US11588568B2
公开(公告)日：2023-02-21
申请号：US17576423
申请日：2022-01-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinhui Wang , Liqing Chen , Hongwei Niu , Yunlei Qi
IPC: H04J3/06
Abstract: A packet processing method includes receiving a first packet by a first receiving interface of a media conversion module of a first network device, where the first packet includes a first alignment marker (AM), sending a second packet by a first sending interface of the media conversion module, where the second packet includes the first AM, and where the second packet is the first packet processed by the media conversion module, and calculating a time interval T1 between a time at which the media conversion module receives the first packet and a time at which the media conversion module sends the second packet, where the T1 is used to compensate for a first timestamp at which the first network device receives or sends the third packet.
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Patent Agency Ranking
公开(公告)号：US20220337384A1
公开(公告)日：2022-10-20
申请号：US17857412
申请日：2022-07-05
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jingfei Lv , Yawei Zhang , Jinhui Wang , Hao Li
Abstract: A clock port attribute recovery method includes a network device setting a value of a port attribute of a clock port of the network device to a first value based on the clock port not receiving any one of three types of clock messages: N synchronization messages, follow-up messages, and delay response messages within a timeout interval, where the first value indicates that a message is lost on the clock port. Based on a case that a recovery condition is met, the network device sets the value of the port attribute of the clock port to a second value, where the second value indicates that a status of the clock port is that the message is not lost.
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公开(公告)号：US11228387B2
公开(公告)日：2022-01-18
申请号：US17008924
申请日：2020-09-01
Applicant: Huawei Technologies Co., Ltd.
Inventor： Junfeng Luo , Jinhui Wang , Zhu Cheng , Feng Wu
Abstract: A time synchronization method and a device, where the method includes generating, by a first device, a first time synchronization frame according to a first coding scheme, where the first time synchronization frame includes a first frame header and a first time of day (TOD), the first frame header carries an identifier of the first coding scheme, and the first coding scheme defines a boundary of the first time synchronization frame and a location of the first TOD in the first time synchronization frame, and sending, by the first device, the first time synchronization frame to a second device using a first single line to trigger the second device to identify the first time synchronization frame according to the identifier of the first coding scheme, to obtain the first TOD from the first time synchronization frame, and to trace a time of the first device according to the first TOD.
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公开(公告)号：US11038608B2
公开(公告)日：2021-06-15
申请号：US16401996
申请日：2019-05-02
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jingfei Lv , Jinhui Wang , Chuan Xu
IPC: H04J3/06
Abstract: A frequency synchronization method includes: receiving, by a slave clock, a first pulse signal and a second pulse signal; determining, by the slave clock based on a first phase difference, a second phase difference, a first delay, and a second delay, that a frequency offset of the slave clock relative to the master clock is equal to a first frequency offset, where the first phase difference is a difference between a phase of a third pulse signal generated by the slave clock and a phase of the first pulse signal received by the slave clock, and the second phase difference is a difference between a phase of a fourth pulse signal generated by the slave clock and a phase of the second pulse signal received by the slave clock; and calibrating, by the slave clock, frequency of the slave clock based on the first frequency offset.
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公开(公告)号：US10476657B2
公开(公告)日：2019-11-12
申请号：US16265617
申请日：2019-02-01
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinhui Wang
Abstract: A device and a method for supporting clock transfer of multiple clock domains, where the device includes N phase frequency detectors, N filters, N clock reconstructors, and N clock domain interfaces, where N is an integer greater than or equal to two, the N clock domain interfaces are in a one-to-one correspondence with the N phase frequency detectors, the N filters, and the N clock reconstructors, the N phase frequency detectors are respectively connected to N clock sources, and at least two clock sources of the N clock sources are different. The foregoing device flexibly adapt to multiple different clock domains, implement that a single device simultaneously supports clock transfer of multiple clock domains, and flexibly satisfy user demands without adding or replacing devices.
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公开(公告)号：US10250377B2
公开(公告)日：2019-04-02
申请号：US16107300
申请日：2018-08-21
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jinhui Wang
Abstract: A device and a method for supporting clock transfer of multiple clock domains, where the device includes N phase frequency detectors, N filters, N clock reconstructors, and N clock domain interfaces, where N is an integer greater than or equal to two, the N clock domain interfaces are in a one-to-one correspondence with the N phase frequency detectors, the N filters, and the N clock reconstructors, the N phase frequency detectors are respectively connected to N clock sources, and at least two clock sources of the N clock sources are different. The foregoing device flexibly adapt to multiple different clock domains, implement that a single device simultaneously supports clock transfer of multiple clock domains, and flexibly satisfy user demands without adding or replacing devices.
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