公开(公告)号：US11954236B2

公开(公告)日：2024-04-09

申请号：US17415189

申请日：2019-08-20

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Joshua Serratelli Schiffman ,  Carey Huscroft ,  Pierre Belgarric

IPC: G06F21/73 ,  G06F21/44 ,  G06F21/57

CPC classification number: G06F21/73 ,  G06F21/44 ,  G06F21/57 ,  G06F2221/2103 ,  G06F2221/2113

Abstract: The disclosure provides a method for verifying authenticity of a component in a product. The method may comprise collecting data relating to a characteristic of the component. The method may further comprise comparing the data to a profile for the component. The profile may comprise an expected characteristic for the component. The method may further comprise determining whether the collected data matches the expected characteristic. The disclosure further provides an apparatus and program.

公开(公告)号：US20220391507A1

公开(公告)日：2022-12-08

申请号：US17761646

申请日：2019-10-25

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Christopher Ian Dalton ,  David Plaquin ,  Pierre Belgarric ,  Titouan Lazard

IPC: G06F21/56 ,  G06F21/85

Abstract: In an example there is provided an apparatus for a computing system. The apparatus comprises a central processing unit (CPU) and at least one further hardware component. The apparatus comprises a probe communicatively coupled with the hardware component and the CPU, to intercept communication between the hardware component and CPU and an inspection module communicatively coupled to the probe, to access communication data intercepted at the probe relating to communication between the hardware component and CPU determine a state of a process executing on the CPU, on the basis of the communication data and apply a model to the state to infer malicious activity on the CPU.

公开(公告)号：US20220164442A1

公开(公告)日：2022-05-26

申请号：US17602305

申请日：2019-08-12

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Christopher Ian Dalton ,  Maugan Villatel ,  Pierre Belgarric

IPC: G06F21/55 ,  G06F21/71 ,  G06F9/38 ,  G06F9/30 ,  G06F9/50

Abstract: There is provided a method for thread allocation in a multi-processor computing system. The method includes determining whether a thread for execution has a security requirement. The thread is allocated to one of a first processing unit or a second processing unit based on the determination. The thread is allocated for execution by the first processing unit based on the thread having the security requirement.

公开(公告)号：US20210312092A1

公开(公告)日：2021-10-07

申请号：US17058152

申请日：2018-10-25

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Pierre Belgarric ,  David Plaquin ,  Eugene Cohen ,  Chris R. Gunning

IPC: G06F21/76 ,  G06K19/073 ,  G06F1/3296 ,  G06F21/60

Abstract: An IC comprising functional circuit to perform primary functions of the IC is provided. The functional circuit is to enable electrical signals to propagate through it within a timing constraint of the functional circuit. The IC comprises at least one canary circuit used for detecting glitch attacks on the circuit. Electrical signals are to propagate through the canary circuit(s) within a defined timing constraint of the canary circuit(s). The canary circuit is to provide a signal path designed such that in the event of a timing constraint of the functional circuit(s) is violated due to a glitch attack, also the timing constraint of the canary circuit(s) is violated.