公开(公告)号：US20210280568A1

公开(公告)日：2021-09-09

申请号：US17302853

申请日：2021-05-13

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Sandeep RAZDAN ,  Ashley J. MAKER

IPC: H01L25/16 ,  H01L31/02 ,  H01L23/498 ,  H01L21/48

Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.

公开(公告)号：US20210072461A1

公开(公告)日：2021-03-11

申请号：US17103735

申请日：2020-11-24

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Ashley J. MAKER ,  Sandeep RAZDAN

IPC: G02B6/26 ,  G02B23/08

Abstract: The present disclosure provides for periscope optical assemblies within interposers that include a bulk material having a first side and a second side opposite to the first side; a first optic defined in the bulk material at a first height in the bulk material along an axis extending between the first second sides; a second optic defined in the bulk material at a second height in the bulk material, different than the first height, along the axis; a first waveguide defined in the bulk material, extending from the first side to the first optic; a second waveguide defined in the bulk material, extending from the second optic to the second side; and a third waveguide defined in the bulk material, extending from the first optic to the second optic.

公开(公告)号：US20190326266A1

公开(公告)日：2019-10-24

申请号：US15961163

申请日：2018-04-24

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Sandeep RAZDAN ,  Ashley J. MAKER

IPC: H01L25/16 ,  H01L31/02 ,  H01L23/498 ,  H01L21/48

Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.

公开(公告)号：US20180313718A1

公开(公告)日：2018-11-01

申请号：US15582306

申请日：2017-04-28

Applicant: Cisco Technology, Inc.

Inventor： Matthew J. TRAVERSO ,  Ravi S. TUMMIDI ,  Mark A. WEBSTER ,  Sandeep RAZDAN

IPC: G01M11/00 ,  G02B6/12 ,  G02B6/13

CPC classification number: G01M11/30 ,  G02B6/12 ,  G02B6/122 ,  G02B6/13 ,  G02B2006/1213

Abstract: Embodiments herein describe techniques for testing optical components in a photonic chip using a testing structure disposed in a sacrificial region of a wafer. In one embodiment, the wafer is processed to form multiple photonic chips integrated into the wafer. While forming optical components in the photonic chips (e.g., modulators, detectors, waveguides, etc.), a testing structure can be formed in one or more sacrificial regions in the wafer. In one embodiment, the testing structure is arranged near an edge coupler in the photonic chip such that an optical signal can be transferred between the photonic chip and the testing structure. Moreover, the testing structure has a grating coupler disposed at or near a top surface of the wafer which permits optical signals to be transmitted into, or received from, the grating coupler when an optical probe is arranged above the grating coupler.