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公开(公告)号：US11222567B2
公开(公告)日：2022-01-11
申请号：US16334938
申请日：2018-08-14
Inventor： Xianrui Qian , Zixuan Wang , Yuting Chen , Fei Li , Bo Li
Abstract: A shift register circuit includes a noise reduction sub-circuit and a pull-down node control sub-circuit. A control end of the noise reduction sub-circuit is connected to a pull-down node, the noise reduction sub-circuit is connected to a first voltage input end. The pull-down node control sub-circuit includes a first pull-down node control sub-circuit and a second pull-down node control sub-circuit. The second pull-down node control sub-circuit controls the pull-down control node to be connected to a first clock signal input end when the first clock signal input end inputs a first level, the pull-down node to be connected to the first clock signal input end when a potential of the pull-down control node is at the first level, so that the potential of the pull-down node is at a first level and a noise reduction transistor included in the noise reduction sub-circuit is turned off.
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公开(公告)号：US20210247634A1
公开(公告)日：2021-08-12
申请号：US16767472
申请日：2019-11-29
Inventor： Yuting Chen , Tong Yang , Suzhen Mu
Abstract: A display substrate, a display device and a test method of the display substrate are disclosed. The display substrate includes a display region and a peripheral region. The peripheral region includes: a first leading wire extending in a first direction and including a first end and a second end; a first test wire electrically connected with the first leading wire at a first position of the first test wire between the first end and the second end; the display region includes first signal wires of first group extending in a second direction, two first signal wires arranged outermost in the first direction among the first signal wires of first group are respectively connected with the first end and the second end, and remaining first signal wires among the first signal wires of first group are connected with the first leading wire between the first end and the second end.
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13.发明授权公开(公告)号：US10885999B2
公开(公告)日：2021-01-05
申请号：US16120869
申请日：2018-09-04
Inventor： Xianrui Qian , Yuting Chen , Fei Li , Bo Li
Abstract: The embodiments of the present application provide a shift register, a method for controlling the same, a gate driving circuit, and a display apparatus. The shift register includes: an input circuit coupled to a signal input terminal and a pull-up node; a pull-up circuit coupled to the pull-up node, a first clock signal terminal and a signal output terminal; a pull-down circuit coupled to a reset signal terminal, a first voltage signal terminal, the pull-up node, and the signal output terminal; a pull-down control circuit coupled to a second clock signal terminal, the pull-up node, a pull-down node, and the first voltage signal terminal; a first de-noising circuit coupled to the pull-up node, the signal input terminal, the first voltage signal terminal, and a compensation node; and a compensation circuit coupled to the first clock signal terminal, the second clock signal terminal, and the compensation node.
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14.发明授权公开(公告)号：US10796635B2
公开(公告)日：2020-10-06
申请号：US16152263
申请日：2018-10-04
Inventor： Xianrui Qian , Yuting Chen , Zixuan Wang , Bo Li , Fei Li
IPC: G09G3/3233 , G09G3/3266
Abstract: The present disclosure relates to a pixel driving circuit and a driving method for the same and a display panel. The pixel driving circuit includes a driver unit, a circuit switching unit, and a storage capacitor unit. The driver unit includes a first sub-driver unit and a second sub-driver unit. The circuit switching unit has a first switching unit and a second switching unit. Two terminals of the first switching unit are electrically connected to a first terminal of the light emitting unit and the first sub-driver unit, respectively, two terminals of the second switching unit are electrically connected to the light emitting unit and the second sub-driver unit, respectively, and the circuit switching unit is configured to switch conductive states of the first switching unit and the second switching unit.
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Patent Agency Ranking
公开(公告)号：US20210012709A1
公开(公告)日：2021-01-14
申请号：US16339565
申请日：2018-09-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xianrui Qian , Fei Li , Bo Li , Yuting Chen , Zixuan Wang
IPC: G09G3/3233
Abstract: The present disclosure provides a pixel driving circuit, a driving method thereof, and a display device, and relates to the field of display technology. The pixel driving circuit includes a first driver, a second driver, and a light emitting element. The first driver is configured to generate a first driving current. The second driver is configured to generate a second driving current. The first driving current and the second driving current alternately drive the light emitting element as a main driving current.
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公开(公告)号：US10593245B2
公开(公告)日：2020-03-17
申请号：US15761749
申请日：2017-09-20
Inventor： Zixuan Wang , Fei Wang , Yuting Chen
IPC: G11C19/28 , G09G3/36 , G09G3/20 , G09G3/3266
Abstract: A shift register, a gate driving circuit, a display panel and a driving method. The shift register includes: an input circuit, connected with a pull-up node and an input signal terminal respectively; a reset circuit, connected with the pull-up node, a reset signal terminal and a first power terminal respectively to receive a first power voltage; an output circuit, connected with the pull-up node, a clock signal terminal and an output terminal respectively; and an output pull-down circuit, connected with the output terminal and configured to write a second power voltage to the output terminal, where the first power voltage is different from the second power voltage.
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公开(公告)号：US20190311667A1
公开(公告)日：2019-10-10
申请号：US16252992
申请日：2019-01-21
Inventor： Xianrui QIAN , Yuting Chen , Zixuan Wang , Bo Li , Fei Li
Abstract: A display device, a gate drive circuit, a shift register and its control method are described. The shift register includes: an input circuit, a first output circuit, a second output circuit, a control circuit and an output drive circuit, wherein the output drive circuit is connected to a second signal input terminal, a pull-up node, a control terminal of the second output circuit and a low voltage signal terminal, and is configured to write a voltage of the second signal input terminal into the control terminal of the second output circuit and superimpose a voltage of the pull-up node onto the control terminal of the second output circuit under the control of a second input signal provided at the second signal input terminal, such that the second output circuit is fully turned on to ensure that it has good output capability when working at a low temperature.
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18.发明授权公开(公告)号：US10416739B2
公开(公告)日：2019-09-17
申请号：US15531365
申请日：2016-06-24
Inventor： Yuting Chen
IPC: G11C19/28 , G09G3/3266 , G09G3/36 , G06F1/24 , G11C7/04
Abstract: The present disclosure relates to a shift register unit, a driving method and a driving apparatus thereof, and a gate driving circuit, wherein the shift register unit comprises an auxiliary output module which can generate a pulse at a first level which is synchronous with the scan pulse to be added to the scan pulse when the valid level corresponding to the auxiliary output module is input to the temperature control voltage terminal, which is beneficial to improve the load capacity of the scan pulse output by the scan pulse output terminal, thereby enhancing the driving capability of the shift register unit.
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公开(公告)号：US20190066559A1
公开(公告)日：2019-02-28
申请号：US15761749
申请日：2017-09-20
Inventor： Zixuan Wang , Fei Wang , Yuting Chen
CPC classification number: G09G3/20 , G09G3/3266 , G09G3/3677 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: A shift register, a gate driving circuit, a display panel and a driving method. The shift register includes: an input circuit, connected with a pull-up node and an input signal terminal respectively; a reset circuit, connected with the pull-up node, a reset signal terminal and a first power terminal respectively to receive a first power voltage; an output circuit, connected with the pull-up node, a clock signal terminal and an output terminal respectively; and an output pull-down circuit, connected with the output terminal and configured to write a second power voltage to the output terminal, where the first power voltage is different from the second power voltage.
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