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公开(公告)号:US12191217B2
公开(公告)日:2025-01-07
申请号:US17435098
申请日:2020-02-27
Inventor: Yongqian Li , Can Yuan , Meng Li , Xuehuan Feng , Zhongyuan Wu , Zhidong Yuan
Abstract: The present disclosure provides a motherboard and a manufacturing method for the motherboard, the motherboard includes at least one display area, a periphery area surrounding the at least one display area, a plurality of test terminals, an electrostatic discharge line, a plurality of resistors and at least one thin film transistor. The plurality of test terminals are respectively electrically connected to the electrostatic discharge line through the plurality of resistors. At least one of the plurality of resistors includes an inorganic nonmetal trace. The at least one thin film transistor includes an active layer, and the inorganic nonmetal trace includes a same semiconductor matrix material as the active layer of the at least one thin film transistor.
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公开(公告)号:US12154494B2
公开(公告)日:2024-11-26
申请号:US17772955
申请日:2021-05-13
Inventor: Meng Li , Yongqian Li , Chen Xu , Jingquan Wang , Dacheng Zhang , Yu Wang , Zhidong Yuan , Zhenhua Qiu
IPC: G09G3/3225 , H10K59/131
Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, a plurality of pixels, a plurality of gate lines and a plurality of data lines, wherein the base substrate has a plurality of transparent regions and a plurality of display regions; the pixels are on the base substrate and within the display regions; each pixel includes a plurality of sub pixels; the sub pixels of each pixel are divided into two rows of sub pixels; the gate lines and the data lines are on the base substrate; the sub pixels of a first pixel are connected with the same gate line; the gate line connected with the sub pixels of the first pixel is between the two rows of sub pixels of the first pixel; and the first pixel is any one of the plurality of pixels.
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公开(公告)号:US12087198B2
公开(公告)日:2024-09-10
申请号:US18342953
申请日:2023-06-28
Inventor: Xuehuan Feng , Yongqian Li
CPC classification number: G09G3/20 , G11C19/28 , G09G2310/0267 , G09G2310/0286 , G09G2310/061
Abstract: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output an output blanking output control signal; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal; a selection sub-circuit, having a first terminal connected to the second input sub-circuit, a second terminal connected to the first input sub-circuit, and a third terminal connected to a first node, configured to control a potential of the first node according to the display output control signal and the blanking output control signal; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node.
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公开(公告)号:US12051386B2
公开(公告)日:2024-07-30
申请号:US17770250
申请日:2021-04-15
Inventor: Xuehuan Feng , Yongqian Li
CPC classification number: G09G5/006 , G11C19/28 , G09G2310/0286 , G09G2310/08
Abstract: The present disclosure provides a shift register unit, a signal generation unit circuit, a driving method and a display device. The shift register unit includes a first node control circuit, a second node control circuit and an output circuit, the first node control circuit is used to control a potential of a first node; the second node control circuit controls a potential of a second node; the output circuit is used to control and maintain the potential of the first node and the potential of the second node, and control to connect the output terminal and the second clock signal terminal under the control of the potential of the first node, and control to connect the input terminal and the second voltage terminal under the control of the potential of the second node.
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公开(公告)号:US20240233644A1
公开(公告)日:2024-07-11
申请号:US18547182
申请日:2022-09-30
Inventor: Liu Wu , Can Yuan , Zhidong Yuan , Cheng Xu , Luke Ding , Yongqian Li , Xiuting Liu
IPC: G09G3/3233 , H10K59/131
CPC classification number: G09G3/3233 , H10K59/131 , G09G2300/0814 , G09G2300/0819 , G09G2300/0842 , G09G2310/0221 , G09G2310/04 , G09G2310/08 , G09G2330/021 , G09G2340/0435
Abstract: A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.
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公开(公告)号:US12016219B2
公开(公告)日:2024-06-18
申请号:US17279855
申请日:2020-05-19
Inventor: Zhidong Yuan , Dacheng Zhang , Yongqian Li , Lang Liu , Zhongyuan Wu , Can Yuan , Meng Li
IPC: H10K59/131 , H10K50/842 , H10K59/12 , H10K59/121 , H10K59/122 , H10K71/00
CPC classification number: H10K59/131 , H10K50/8426 , H10K59/121 , H10K59/122 , H10K71/00 , H10K59/1201
Abstract: A display substrate includes: a base substrate including a display area and a peripheral area pixel units in the display area, each including a pixel drive circuit and a light emitting device the light emitting device including a first electrode, a second electrode, and a light emitting layer; a first power trace located in the peripheral area and electrically connected to the first electrode; a second power trace located in the peripheral area and electrically connected to the second electrode; a planarization layer with at least a portion thereof being located in the peripheral area. An orthographic projection of the planarization layer on the base substrate at least partially overlaps an orthographic projection of each of the first and second power traces on the base substrate, the first and second power traces are located in different layers, and a portion of the planarization layer is located between the first and second power traces.
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公开(公告)号:US20240185795A1
公开(公告)日:2024-06-06
申请号:US17781268
申请日:2021-07-08
Inventor: Yongqian Li , Can Yuan
IPC: G09G3/3266 , G09G3/3225 , G09G3/3291
CPC classification number: G09G3/3266 , G09G3/3225 , G09G3/3291
Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate; a plurality of pixels; and a light emitting control line and a first power supply line which are electrically connected to a light emitting control circuit of the pixel. The light emitting control circuits of pixels located in two adjacent rows share the same light emitting control line. The light emitting control circuit includes a light emitting control transistor, the gate of the light-emitting control transistor is electrically connected to the light emitting control line, one of the first electrode and the second electrode of the light emitting control transistor is connected to the first power supply line, and the first power supply line extends in parallel to the light emitting control line.
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公开(公告)号:US11985872B2
公开(公告)日:2024-05-14
申请号:US17309882
申请日:2020-12-29
Inventor: Can Yuan , Yongqian Li , Zhidong Yuan
IPC: H10K59/131 , G09G3/3233 , H10K59/121
CPC classification number: H10K59/131 , G09G3/3233 , G09G2300/0408 , G09G2300/0426 , G09G2300/0842 , G09G2320/0233 , H10K59/1216
Abstract: A display panel and an electronic device are provided. The display panel includes: a base substrate; a plurality of gate lines and a plurality of data lines located on the base substrate. A plurality of sub-pixel units are located on the base substrate, and at least one of the plurality of sub-pixel units includes a light-emitting element, a switching transistor, an induction transistor, a driving transistor and a storage transistor. In this sub-pixel unit, an orthographic projection of the switching transistor on the base substrate and an orthographic projection of the induction transistor on the base substrate are located on a first side of an orthographic projection of the storage capacitor on the base substrate. An orthographic projection of the driving transistor on the base substrate is located on a second side of the orthographic projection of the storage capacitor on the base substrate.
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公开(公告)号:US11984072B2
公开(公告)日:2024-05-14
申请号:US17921911
申请日:2021-06-03
Inventor: Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/3225
CPC classification number: G09G3/3225 , G09G2300/0819 , G09G2300/0842 , G09G2310/0297 , G09G2320/0219 , G09G2320/0223 , G09G2320/0233
Abstract: A display substrate (100) and a design method therefor, and a display apparatus. The display substrate (100) includes: pixel circuits which are arranged in an array, where the pixel circuits are divided into at least two areas; and data switching circuits (10), which are correspondingly connected to the pixel circuits in the areas by means of data signal lines, wherein a channel width-to-length ratio (W/L) of a switch device in each data switching circuit (10) is positively correlated with a design data load of an area corresponding to the data switching circuit (10). The width-to-length ratios (W/L) of different switch devices can be matched according to different design data loads of different areas.
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公开(公告)号:US11972821B2
公开(公告)日:2024-04-30
申请号:US17766828
申请日:2021-04-15
Inventor: Zhidong Yuan , Yongqian Li , Can Yuan
CPC classification number: G11C19/28 , G09G3/32 , G09G2300/0426 , G09G2310/0286 , G09G2310/08
Abstract: A shift register unit and a control method thereof, a gate driving circuit, and a display device are provided. The shift register unit comprises: a first control circuit (110) and an energy storage circuit (150), which directly control the potential of a first node (Q1); a pull-down control circuit (120), a second control circuit (130) and a first pull-down circuit (140), which indirectly control the potential of the first node (Q1); and an output circuit (160), which outputs, under the control of the potential of the first node (Q1), a first voltage signal provided by a first voltage end (VDD) to a signal output end. By means of the shift register unit, the control method thereof and the gate drive circuit, the pulse width of a gate scanning signal can be adjusted, thereby meeting various display requirements.
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