公开(公告)号：US20240282263A1

公开(公告)日：2024-08-22

申请号：US18650738

申请日：2024-04-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Weixing LIU ,  Kuanjun PENG ,  Bin QIN ,  Xue DONG ,  Fangzhen ZHANG ,  Wanpeng TENG ,  Tieshi WANG ,  Wanzhi CHEN ,  Kai GUO ,  Chunfang ZHANG

IPC: G09G3/3233 ,  H01L27/15 ,  H01L33/06 ,  H01L33/38

CPC classification number: G09G3/3233 ,  H01L27/156 ,  H01L33/06 ,  H01L33/38 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0262 ,  G09G2310/08 ,  G09G2320/0233

Abstract: A pixel driving circuit includes a data writing circuit, a light-emitting control circuit, a switching circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is configured to transmit a first voltage signal received at the first voltage signal terminal to a second node. The switching circuit includes switching transistors. The light-emitting diode chip is electrically connected to the second node. The light-emitting diode chip includes light-emitting portions. The light-emitting diode chip is configured to drive the light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time. At least part of the light-emitting portions are sequentially connected in series through at least one switching transistor.

公开(公告)号：US20230013848A1

公开(公告)日：2023-01-19

申请号：US17783207

申请日：2021-05-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lubin SHI ,  Wanpeng TENG ,  Liang CHEN ,  Bin QIN ,  Ke WANG ,  Jintao PENG ,  Fangzhen ZHANG ,  Kuanjun PENG

IPC: H01L27/32

Abstract: A display panel has a display region and a fan-out lead region, the fan-out lead region is located within the display region. The display panel comprises a base, a pixel circuit layer, a plurality of fan-out leads disposed between the base and the pixel circuit layer and located in the fan-out lead region, and an electrical field shielding pattern disposed between the pixel circuit layer and a film layer in which the plurality of fan-out leads are located. The pixel circuit layer includes a plurality of pixel circuits, at least one pixel circuit is located in the fan-out lead region. At least one fan-out lead is electrically connected to the pixel circuits. Orthographic projection of active layer patterns of transistors of the pixel circuit located in the fan-out lead region on the base are located within an orthographic projection of the electric field shielding pattern on the base.