公开(公告)号：US20220075734A1

公开(公告)日：2022-03-10

申请号：US17016229

申请日：2020-09-09

Applicant: Apple Inc.

Inventor： John D. Pape ,  Brian R. Mestan ,  Peter G. Soderquist

IPC: G06F12/1027 ,  G06F9/455

Abstract: Systems, apparatuses, and methods for performing efficient translation lookaside buffer (TLB) invalidation operations for splintered pages are described. When a TLB receives an invalidation request for a specified translation context, and the invalidation request maps to an entry with a relatively large page size, the TLB does not know if there are multiple translation entries stored in the TLB for smaller splintered pages of the relatively large page. The TLB tracks whether or not splintered pages for each translation context have been installed. If a TLB invalidate (TLBI) request is received, and splintered pages have not been installed, no searches are needed for splintered pages. To refresh the sticky bits, whenever a full TLB search is performed, the TLB rescans for splintered pages for other translation contexts. If no splintered pages are found, the sticky bit can be cleared and the number of full TLBI searches is reduced.

公开(公告)号：US09852084B1

公开(公告)日：2017-12-26

申请号：US15017427

申请日：2016-02-05

Applicant: Apple Inc.

Inventor： Peter G. Soderquist ,  Pradeep Kanapathipillai ,  Bernard J. Semeria ,  Joshua P. de Cesare ,  David J. Williamson ,  Gerard R. Williams, III

IPC: G06F12/14 ,  G06F12/1009

CPC classification number: G06F12/1483 ,  G06F12/1009 ,  G06F2212/1052

Abstract: Systems, apparatuses, and methods for modifying access permissions in a processor. A processor may include one or more permissions registers for managing access permissions. A first permissions register may be utilized to override access permissions embedded in the page table data. A plurality of bits from the page table data may be utilized as an index into the first permissions register for the current privilege level. An attribute field may be retrieved from the first permissions register to determine the access permissions for a given memory request. A second permissions register may also be utilized to set the upper and lower boundary of a region in physical memory where the kernel is allowed to execute. A lock register may prevent any changes from being made to the second permissions register after the second permissions register has been initially programmed.