公开(公告)号：US11960339B2

公开(公告)日：2024-04-16

申请号：US17371459

申请日：2021-07-09

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Eric J. Chapman ,  Alan D. Smith ,  Edward Chang

IPC: G06F1/28 ,  H01L25/18

CPC classification number: G06F1/28 ,  H01L25/18

Abstract: A multi-die processor semiconductor package includes a first base integrated circuit (IC) die configured to provide, based at least in part on an indication of a configuration of a first plurality of compute dies 3D stacked on top of the first base IC die, a unique power domain to each of the first plurality of compute dies. In some embodiments, the semiconductor package also includes a second base IC die including a second plurality of compute dies 3D stacked on top of the second base IC die and an interconnect communicably coupling the first base IC die to the second base IC die.

公开(公告)号：US20230132931A1

公开(公告)日：2023-05-04

申请号：US17515976

申请日：2021-11-01

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECNOLOGIES ULC

Inventor： Joseph L. Greathouse ,  Sean Keely ,  Alan D. Smith ,  Anthony Asaro ,  Ling-Ling Wang ,  Milind N. Nemlekar ,  Hari Thangirala ,  Felix Kuehling

IPC: G06F3/06 ,  G06F13/28

Abstract: A method for hardware management of DMA transfer commands includes accessing, by a first DMA engine, a DMA transfer command and determining a first portion of a data transfer requested by the DMA transfer command. Transfer of a first portion of the data transfer by the first DMA engine is initiated based at least in part on the DMA transfer command. Similarly, a second portion of the data transfer by a second DMA engine is initiated based at least in part on the DMA transfer command. After transferring the first portion and the second portion of the data transfer, an indication is generated that signals completion of the data transfer requested by the DMA transfer command.