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11.发明授权Auto software configurable register address space for low power programmable processor 有权自动软件可配置的寄存器地址空间用于低功耗可编程处理器公开(公告)号：US07389006B2
公开(公告)日：2008-06-17
申请号：US10846106
申请日：2004-05-14
CPC分类号： G06T15/005
摘要： A configurable graphics pipeline has more than one possible process flow of pixel packets through elements of the graphics pipeline. In one embodiment, a data packet triggers an element of the graphics pipeline to discover an identifier.
摘要翻译： 可配置的图形流水线通过图形流水线的元素具有多个可能的像素数据包流程。 在一个实施例中，数据分组触发图形流水线的元素以发现标识符。
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公开(公告)号：US07268786B2
公开(公告)日：2007-09-11
申请号：US10846226
申请日：2004-05-14
CPC分类号： G06T15/005
摘要： A graphics processor has elements of a graphics pipeline coupled by distributors. The distributors permit the process flow of pixel packets through the pipeline to be reconfigured in response to a command from a host.
摘要翻译： 图形处理器具有由分配器耦合的图形流水线的元件。 分配器允许响应于来自主机的命令来重新配置像素分组通过流水线的处理流程。
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公开(公告)号：US07250953B2
公开(公告)日：2007-07-31
申请号：US10845714
申请日：2004-05-14
CPC分类号： G06T15/005
摘要： A graphics processor includes a graphics pipeline having a set of tap points. A configurable test point selector monitors a selected subset of tap points and counts statistics for at least one condition associated with each tap point of the subset of tap points.
摘要翻译： 图形处理器包括具有一组抽头点的图形管线。 可配置的测试点选择器监视所选择的抽头子集，并对与抽头点子集的每个抽头点相关联的至少一个条件进行统计。
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公开(公告)号：US07199799B2
公开(公告)日：2007-04-03
申请号：US10846334
申请日：2004-05-14
IPC分类号： G06F15/00
CPC分类号： G06T1/20
摘要： A graphics processor includes an arithmetic logic unit (ALU) stage for processing pixel packets. Pixels are assigned as either even pixels or odd pixels. The pixel packets of odd and even pixels are interleaved to account for ALU latency.
摘要翻译： 图形处理器包括用于处理像素数据包的算术逻辑单元（ALU）级。 像素被分配为偶数像素或奇数像素。 奇数和偶数像素的像素包被交织以考虑ALU延迟。
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15.发明授权Method and system for a general instruction raster stage that generates programmable pixel packets 有权用于生成可编程像素数据包的通用指令光栅阶段的方法和系统公开(公告)号：US07190366B2
公开(公告)日：2007-03-13
申请号：US10845642
申请日：2004-05-14
申请人： Edward A. Hutchins , Sekhar Nori
发明人： Edward A. Hutchins , Sekhar Nori
IPC分类号： G06F15/80
CPC分类号： G06T15/005 , G06T11/40
摘要： A method and system for a general instruction capable raster stage that generates flexible pixel packets is disclosed. In one embodiment, the rasterizing of a geometric primitive comprising a plurality of vertices wherein each vertex comprises a respective color value, is performed by a rasterization module of a graphics pipeline. The rasterizing includes a plurality of programmable interpolators for computing pixel parameters for pixels of a geometric primitive. The rasterizing module further includes a memory for storing a first instruction associated with a first programmable interpolator for indicating a first parameter on which said first programmable interpolator is to operate and for indicating a first portion of a pixel packet in which to store its results. The rasterizing module additionally includes a memory for storing a second instruction associated with a second programmable interpolator for indicating a second parameter on which said second programmable interpolator is to operate and also for indicating a second portion of said pixel packet in which to store its results.
摘要翻译： 公开了一种用于产生柔性像素分组的通用指令的光栅级的方法和系统。 在一个实施例中，包括多个顶点的几何图元的光栅化，其中每个顶点包括相应的颜色值，由图形流水线的光栅化模块执行。 光栅化包括用于计算几何图元的像素的像素参数的多个可编程内插器。 光栅化模块还包括存储器，用于存储与第一可编程内插器相关联的第一指令，用于指示所述第一可编程内插器将要运行的第一参数，以及用于指示其中存储其结果的像素分组的第一部分。 光栅化模块还包括存储器，用于存储与第二可编程内插器相关联的第二指令，用于指示所述第二可编程内插器将要工作的第二参数，并且还用于指示其中存储其结果的所述像素分组的第二部分。
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16.发明授权Method and system for deferred evaluation of transforms in graphics processors 有权用于图形处理器中变换的延迟评估的方法和系统公开(公告)号：US07106336B1
公开(公告)日：2006-09-12
申请号：US10846787
申请日：2004-05-14
申请人： Edward A. Hutchins
发明人： Edward A. Hutchins
CPC分类号： G06T15/10 , G06T11/40 , G06T15/005
摘要： A method of deferring evaluation of a transform, in accordance with one embodiment of the present invention, includes buffering a plurality of vertex data. The method also includes receiving a draw command, accessing a given vertex data corresponding to the draw command and an associated transform indicator bit. The given vertex data is transformed if the associated indicator bit is cleared. After performing the transform, the vertex data is overwritten with the transformed vertex data and the associated transform indicator bit is set.
摘要翻译： 根据本发明的一个实施例的延迟评估变换的方法包括缓冲多个顶点数据。 该方法还包括接收绘制命令，访问对应于绘制命令的给定顶点数据和相关联的变换指示符位。 如果关联的指示符位被清除，则转换给定的顶点数据。 在执行变换之后，顶点数据被变换的顶点数据覆盖，并且相关联的变换指示符位被置位。
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公开(公告)号：US08775777B2
公开(公告)日：2014-07-08
申请号：US11893584
申请日：2007-08-15
申请人： Tyson J. Bergland , Craig M. Okruhlica , Michael J. M. Toksvig , Justin M. Mahan , Edward A. Hutchins
发明人： Tyson J. Bergland , Craig M. Okruhlica , Michael J. M. Toksvig , Justin M. Mahan , Edward A. Hutchins
IPC分类号： G06F15/76
CPC分类号： G06F9/3016 , G06F9/30036 , G06F9/30167 , G06F9/30185 , G06F9/3853 , G06F9/3885 , G06T15/005
摘要： Sourcing immediate values from a very long instruction word includes determining if a VLIW sub-instruction expansion condition exists. If the sub-instruction expansion condition exists, operation of a portion of a first arithmetic logic unit component is minimized. In addition, a part of a second arithmetic logic unit component is expanded by utilizing a block of a very long instruction word, which is normally utilized by the first arithmetic logic unit component, for the second arithmetic logic unit component if the sub-instruction expansion condition exists.
摘要翻译： 从非常长的指令字中采集即时值包括确定是否存在VLIW子指令扩展条件。 如果存在子指令扩展条件，则将第一算术逻辑单元组件的一部分的操作最小化。 此外，如果副指令扩展，则第二算术逻辑单元组件的一部分通过利用第二算术逻辑单元组件通常由第一算术逻辑单元组件使用的非常长的指令字的块来扩展 条件存在。
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公开(公告)号：US08743142B1
公开(公告)日：2014-06-03
申请号：US10845986
申请日：2004-05-14
CPC分类号： G06T11/40 , G06T15/005 , G06T15/04 , G06T2200/28 , G06T2210/32
摘要： A present invention pixel processing system and method permit complicated three dimensional images to be rendered with shallow graphics pipelines including reduced gate counts and facilitates power conservation by utilizing a single unified data fetch stage (e.g., unified data fetch module) that retrieves a variety of different pixel surface attribute values (e.g., depth, color, and/or texture values) in a single stage. Different types of pixel surface attribute data (e.g., depth, color, texture) associated with multiple graphics processing functions (e.g., color blending, texture mapping, etc.) are retrieved in the single unified data fetch graphics pipeline stage. The pixel surface attribute values may be placed in corresponding variable fields of a pixel packet row. The pixel packet rows including the pixel surface attribute values are forwarded to downstream graphics pipeline stages (e.g., an arithmetic logic pipestage).
摘要翻译： 本发明的像素处理系统和方法允许使用包括减少的门数的浅图形管线来呈现复杂的三维图像，并且通过利用单个统一的数据提取阶段（例如，统一的数据获取模块）来简化功率节省，该统一数据获取阶段检索各种不同的 像素表面属性值（例如，深度，颜色和/或纹理值）。 在单个统一数据提取图形流水线阶段检索与多个图形处理功能（例如，颜色混合，纹理映射等）相关联的不同类型的像素表面属性数据（例如，深度，颜色，纹理）。 像素表面属性值可以被放置在像素分组行的对应的可变字段中。 包括像素表面属性值的像素分组行被转发到下游图形流水线级（例如，算术逻辑分支）。
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公开(公告)号：US08736624B1
公开(公告)日：2014-05-27
申请号：US11893514
申请日：2007-08-15
CPC分类号： G06T15/005
摘要： Detailed herein are approaches to enabling conditional execution of instructions in a graphics pipeline. In one embodiment, a method of conditional execution controller operation is detailed. The method involves configuring the conditional execution controller to evaluate conditional test. A pixel data packet is received into the conditional execution controller, and evaluated, with reference to the conditional test. A conditional execution flag, associated with the pixel data packet, is set, to indicate whether a conditional operation should be performed on the pixel data packet.
摘要翻译： 这里详细描述了使图形管线中的指令能够进行条件执行的方法。 在一个实施例中，详细描述了一种条件执行控制器操作的方法。 该方法包括配置条件执行控制器以评估条件测试。 像素数据包被接收到条件执行控制器中，并参照条件测试进行评估。 设置与像素数据包相关联的条件执行标志，以指示是否应对像素数据包执行条件操作。
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公开(公告)号：US07760936B1
公开(公告)日：2010-07-20
申请号：US11520066
申请日：2006-09-12
CPC分类号： H04N19/176 , H04N19/186 , H04N19/436 , H04N19/90
摘要： Data that includes an encoded version of sets of color component values for a block of texels is accessed. The encoded version includes a first set of color component values selected from a pre-encoded version of the sets and a second set of color component values selected from the pre-encoded version of the sets. The first set and the second set correspond to endpoints of a range of colors. The encoded version further includes index values associated with the texels. The first set and the second set and an index value associated with a texel are used to decode a third set of color component values that describes a color for the texel. The index value indicates how to determine the third set using the first set and the second set.
摘要翻译： 访问包含纹理块块的颜色分量值集合的编码版本的数据。 编码版本包括从组的预编码版本中选择的第一组颜色分量值和从组的预编码版本中选择的第二组颜色分量值。 第一组和第二组对应于一系列颜色的端点。 编码版本还包括与纹素相关联的索引值。 第一组和第二组以及与纹素相关联的索引值用于解码描述纹素的颜色的第三组颜色分量值。 索引值指示如何使用第一组和第二组确定第三组。
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