Test circuits of an apparatus for testing micro SD devices
    11.
    发明授权
    Test circuits of an apparatus for testing micro SD devices 失效
    用于测试微型SD设备的设备的测试电路

    公开(公告)号:US07518357B2

    公开(公告)日:2009-04-14

    申请号:US11786768

    申请日:2007-04-12

    CPC classification number: G01R31/2893 G01R31/2887

    Abstract: Apparatus for testing micro SD devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus comprises a test hive comprising: a plurality of test circuits corresponding in number to at least a predetermined number of cells in the tray; and a plurality of groups of test contacts, each group is coupled to one of the test circuits and is oriented to engage the plurality of electrical contacts of a micro SD device disposed in a corresponding one of the cells. The test hive is operable to simultaneously, electrically test at least a predetermined number of the number of the micro SD devices in each tray engaged by the hive without removing the micro SD devices that did pass electrical testing until a tray of electrically tested micro SD devices is fully populated with micro SD devices that did pass electrical testing.

    Abstract translation: 描述了用于测试每个具有多个电引线的微型SD设备的装置。 该设备采用行业标准的JEDEC托盘,同时对这些托盘中的所有设备进行测试。 该装置包括测试蜂巢,其包括:多个测试电路,其数量对应于托盘中的至少预定数量的单元; 以及多组测试触点,每个组耦合到一个测试电路,并且被定向成接合设置在相应的一个单元中的微型SD器件的多个电触头。 测试配置单元可同时操作,电测试由蜂巢接合的每个托盘中至少预定数量的微型SD设备,而不需要移除通过电测试的微型SD设备,直到经过电测试的微型SD设备 完全填充了通过电气测试的微型SD设备。

    Test circuits of an apparatus for testing system-in-package devices
    12.
    发明授权
    Test circuits of an apparatus for testing system-in-package devices 失效
    用于测试系统级封装器件的设备的测试电路

    公开(公告)号:US07514914B2

    公开(公告)日:2009-04-07

    申请号:US11786760

    申请日:2007-04-12

    CPC classification number: G01R31/2893 G01R31/31718 G01R31/31905

    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus of the illustrative embodiment comprises a test hive comprising: a plurality of test circuits corresponding in number to the number of cells in the tray; and a plurality of groups of test contacts, each of the groups of the test contacts being coupled to one of the test circuits and being oriented to engage the plurality of electrical contacts of SIP device disposed in a corresponding one of the cells, the test hive being operable to simultaneously, electrically test all of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray.

    Abstract translation: 描述了具有多个电引线的用于测试系统级封装(SIP)器件的装置。 该设备采用行业标准的JEDEC托盘,同时对这些托盘中的所有设备进行测试。 说明性实施例的装置包括测试蜂巢,其包括:多个对应于托盘中的小区数目的测试电路; 以及多组测试触点,所述测试触点组中的每一个耦合到所述测试电路中的一个并且被定向成接合设置在相应的一个单元中的SIP设备的多个电触头,所述测试配置单元 可操作以同时电测试由蜂巢接合的每个托盘中的所有SIP设备,而不从托盘移除SIP设备。

    Apparatus and method for detection of contaminant particles or component defects
    14.
    发明申请
    Apparatus and method for detection of contaminant particles or component defects 审中-公开
    用于检测污染物颗粒或组分缺陷的装置和方法

    公开(公告)号:US20060066846A1

    公开(公告)日:2006-03-30

    申请号:US11234392

    申请日:2005-09-26

    CPC classification number: G01N21/94 G01N21/8851 G01N21/896 G01N21/958

    Abstract: An apparatus is described for detecting particulates on or defects in a transparent media. The apparatus includes a light source, and an array of light-sensitive elements, each of which produce an electrical signal indicating a characteristic value based on light incident on the element. The first array is disposed a predetermined distance from the at least one light source so that the transparent media may be placed between the light source and the array. An addressing circuit reads the characteristic values produced by each element, and an analog-to-digital converter circuit digitizes the characteristic values, producing digitized values. A processor processes the digitized values to determine whether a particle or defect is present at least based on a position of the shadow cast by the particle or defect on the array. A method for detecting a particulate or defect on or in a transparent media is also described.

    Abstract translation: 描述了一种用于检测透明介质上的微粒或缺陷的装置。 该装置包括光源和一组光敏元件,每个光敏元件根据入射在元件上的光产生表示特征值的电信号。 第一阵列与至少一个光源设置预定距离,使得透明介质可以被放置在光源和阵列之间。 寻址电路读取由每个元件产生的特征值,并且模数转换器电路对特征值进行数字化,产生数字化值。 处理器处理数字化值以至少基于粒子投射的阴影的位置或阵列上的缺陷来确定粒子或缺陷是否存在。 还描述了在透明介质上或其中检测颗粒或缺陷的方法。

    Apparatus for testing system-in-package devices
    15.
    发明授权
    Apparatus for testing system-in-package devices 失效
    用于测试系统级封装器件的装置

    公开(公告)号:US07518356B2

    公开(公告)日:2009-04-14

    申请号:US11786747

    申请日:2007-04-12

    CPC classification number: G01R31/2893

    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical contacts is described. The apparatus comprises a JEDEC standard tray receiving apparatus comprising a plurality of tray aligners to align the tray into a predetermined position to account for dimensional tolerances of the tray. The apparatus further comprises a test assembly proximate the tray receiving apparatus. The assembly comprises; a plurality of test circuits corresponding in number to the number of cells in the tray, a plurality of groups of test contacts, each of group of the test contacts being coupled to one of the test circuits and being oriented to engage a plurality of electrical contacts of a SIP device disposed in a corresponding one of the cell, the plurality of test circuits being operable to simultaneously, electrically test a predetermined number of SIP devices in a JEDEC standard tray engaged by the receiving apparatus without removing the SIP devices from the tray.

    Abstract translation: 描述了具有多个电触头的用于测试系统级封装(SIP)器件的装置。 该设备包括JEDEC标准托盘接收设备,其包括多个托盘对准器,以将托盘对准到预定位置以考虑托盘的尺寸公差。 该装置还包括靠近托盘接收装置的测试组件。 组件包括 多个测试电路数量对应于托盘中的单元数量,多组测试触点,每组测试触点耦合到测试电路中的一个并且被定向成接合多个电触头 设置在所述单元中相应的一个单元中的SIP设备,所述多个测试电路可操作以同时电测试由接收设备接合的JEDEC标准盘中的预定数量的SIP设备,而不从托盘移除SIP设备。

    Apparatus for testing system-in-package devices
    19.
    发明申请
    Apparatus for testing system-in-package devices 失效
    用于测试系统级封装器件的装置

    公开(公告)号:US20080252312A1

    公开(公告)日:2008-10-16

    申请号:US11786760

    申请日:2007-04-12

    CPC classification number: G01R31/2893 G01R31/31718 G01R31/31905

    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus of the illustrative embodiment comprises a test hive comprising: a plurality of test circuits corresponding in number to the number of cells in the tray; and a plurality of groups of test contacts, each of the groups of the test contacts being coupled to one of the test circuits and being oriented to engage the plurality of electrical contacts of a SIP device disposed in a corresponding one of the cells, the test hive being operable to simultaneously, electrically test all of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray.

    Abstract translation: 描述了具有多个电引线的用于测试系统级封装(SIP)器件的装置。 该设备采用行业标准的JEDEC托盘,同时对这些托盘中的所有设备进行测试。 说明性实施例的装置包括测试蜂巢,其包括:多个对应于托盘中的小区数目的测试电路; 以及多组测试触点,所述测试触点组中的每一个耦合到所述测试电路中的一个并且被定向成接合设置在相应的一个所述单元中的SIP设备的所述多个电触点,所述测试 蜂巢可操作以同时电测试由蜂巢接合的每个托盘中的所有SIP设备,而不从托盘移除SIP设备。

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