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公开(公告)号：US20220013067A1
公开(公告)日：2022-01-13
申请号：US17280283
申请日：2020-05-15
Inventor： Meng Li , Yongqian Li , Chen Xu , Dacheng Zhang , Jingquan Wang , Shi Sun
IPC: G09G3/3233 , G09G3/3275 , G09G3/3266
Abstract: A pixel driving circuit, a display device and an electronic device are provided. The pixel driving circuit includes: a first sub-pixel driving circuit, a second sub-pixel driving circuit, a third sub-pixel driving circuit, and a fourth sub-pixel driving circuit sequentially arranged in a first direction; a detection line; a first power line extending in the second direction; and a second power line extending in the second direction; wherein one of the first power line and the second power line is provided on a side of the second sub-pixel driving circuit away from the third sub-pixel driving circuit, and the other of the first power line and the second power line is provided on a side of the third sub-pixel driving circuit away from the second sub-pixel driving circuit.
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公开(公告)号：US20220005417A1
公开(公告)日：2022-01-06
申请号：US16478445
申请日：2018-12-21
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266
Abstract: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit configured to receive a first input signal from a first input terminal and output a banking output control signal to a first node in a blanking period of time of a frame; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal to the first node in a display period of time of the frame; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node, wherein the composite output signal includes a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other.
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公开(公告)号：US11200861B2
公开(公告)日：2021-12-14
申请号：US17000219
申请日：2020-08-21
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan
IPC: G09G3/36 , G09G3/3266 , G11C19/28
Abstract: A shift register unit includes a pull-down sustaining sub-circuit and a pull-down sub-circuit. The pull-down sustaining sub-circuit includes: a first transistor having a control electrode configured to input a pull-down sustaining signal, a first electrode connected to a first power signal terminal, and a second electrode connected to a pull-down node; a first capacitor; and a second transistor having a control electrode connected to an input signal terminal. The pull-down sub-circuit includes: a third transistor having a control electrode connected to the first terminal of the first capacitor, a first electrode connected to a pull-up node, and a second electrode connected to the second power signal terminal; a fourth transistor having a control electrode connected to the first terminal of the first capacitor, a first electrode connected to an output sub-circuit, and a second electrode connected to the second power signal terminal.
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公开(公告)号：US11170707B2
公开(公告)日：2021-11-09
申请号：US16618300
申请日：2018-12-26
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3208 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method. The shift register unit includes a blanking input circuit, a display input circuit, an output circuit, and a compensation selection circuit. The blanking input circuit inputs a blanking input signal to a control node, and a blanking signal to a first node in a blanking period of a frame; the display input circuit inputs a display signal to the first node in a display period of the frame in response to a display input signal; the output circuit outputs, under the control of a level of the first node, a composite output signal to an output terminal; the compensation selection circuit is electrically coupled to the output terminal, and charges, in response to a compensation selection control signal, the control node using the composite output signal.
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公开(公告)号：US20210335197A1
公开(公告)日：2021-10-28
申请号：US16478366
申请日：2018-12-21
Inventor： Xuehuan Feng , Yongqian Li
Abstract: Disclosed is a shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output a blanking output control signal to a first node in a blanking period of time of a frame; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal to the first node in a display period of time of the frame; an output sub-circuit, configured to output a composite output signal via an output terminal under control of the first node, the composite output signal including a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other.
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Patent Agency Ranking
公开(公告)号：US20210259086A1
公开(公告)日：2021-08-19
申请号：US17132510
申请日：2020-12-23
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan Xu , Yongqian Li , Guoying Wang , Dacheng Zhang , Lang Liu
Abstract: A display panel and a display apparatus are disclosed. The display panel comprises: a plurality of signal lines extending in a first direction; at least one first reference voltage bus which extends in a second direction intersecting the first direction; and a plurality of electrostatic discharge units divided into a plurality of electrostatic discharge unit groups, wherein the plurality of electrostatic discharge unit groups are arranged in the second direction and each of the plurality of electrostatic discharge unit groups comprises at least two electrostatic discharge units arranged in the first direction, wherein at least one of the plurality of signal lines is electrically connected to the first reference voltage bus through at least one of the plurality of electrostatic discharge units.
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公开(公告)号：US20210256889A1
公开(公告)日：2021-08-19
申请号：US17262775
申请日：2020-06-02
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan
Abstract: An array substrate and a testing method thereof are provided. The array substrate includes a plurality of clock signal lines and a plurality of testing terminals. As at least two of the plurality of clock signal lines may be connected to a same testing terminal, as compared with the arrangement of the related art in which one clock signal line is connected to one testing terminal, the array substrates provided by the embodiments of the present disclosure only need to have less testing terminals, and correspondingly, the testing device that is connected to the testing terminals of the array substrate provided by the embodiments of the present disclosure may contain less pins. Therefore, the testing device can have a relatively low production cost and a relatively small volume.
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公开(公告)号：US11087855B2
公开(公告)日：2021-08-10
申请号：US16533262
申请日：2019-08-06
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yongqian Li , Xuehuan Feng
Abstract: A shift register unit, a gate drive circuit, a display device and a driving method are disclosed. The shift register unit includes a first input circuit, a second input circuit, an output circuit and an anti-crosstalk circuit. The first input circuit is configured to input a first input signal to a first node; the second input circuit is configured to input a second input signal to the first node in a situation where the second node is at a first level and to stop inputting the second input signal to the first node in a situation where the second node is at a second level; the output circuit is configured to output or not output an output signal; the anti-crosstalk circuit is configured to prevent a level of the second node from becoming the first level in a situation where the second node is at the second level.
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公开(公告)号：US11087668B1
公开(公告)日：2021-08-10
申请号：US16312101
申请日：2018-01-04
Inventor： Meng Li , Yongqian Li , Zhidong Yuan , Can Yuan , Zhenfei Cai , Xuehuan Feng
IPC: G09G3/20 , G09G3/3258
Abstract: Embodiments of the present disclosure provide a shift register unit and a driving method thereof, and a gate driving circuit. The shift register unit includes an input circuit, a next-stage start circuit, a control circuit, a stabilization circuit, and at least one output circuit. The at least one output circuit each can control a voltage of a signal output terminal according to a voltage of a pull-up node, a voltage of a pull-down node, a first voltage signal, a control clock signal from a control clock signal terminal, and a control voltage signal from a control voltage signal terminal. A high level of a second clock signal begins when a high level of a first clock signal ends, and a high level of a third clock signal begins when a high level of the second clock signal ends.
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公开(公告)号：US20210233982A1
公开(公告)日：2021-07-29
申请号：US16638556
申请日：2019-09-04
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
Abstract: An array substrate includes a base substrate (1); a driving transistor (2) on the base substrate (1); an insulating layer (3) on the driving transistor (2), the insulating layer (3) comprising a via hole above a first electrode (21) of the driving transistor (2); a conductive portion (4) on the insulating layer (3); and a light emitting device (6) on the conductive portion (4) and electrically connected to the conductive portion (4). The conductive portion (4) may be electrically connected to the first electrode (21) of the driving transistor (2) through the via hole. The light emitting device (6) may be above the via hole, and an orthographic projection of the light emitting device (6) on the base substrate (1) may cover an orthographic projection of the via hole on the base substrate (1).
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