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公开(公告)号：US11922874B2
公开(公告)日：2024-03-05
申请号：US17788627
申请日：2021-09-13
Inventor： Zhidong Yuan , Can Yuan , Yongqian Li , Lang Liu
IPC: G09G3/3233 , G09G3/3283
CPC classification number: G09G3/3233 , G09G3/3283 , G09G2300/0426 , G09G2310/08 , G09G2320/0247
Abstract: The present disclosure provides a display control method and a display control device. The display control method is used for a display panel. The display panel includes at least a first display area and a second display area arranged in a first direction, the first display area is coupled to a first signal line, and the second display area is coupled to a second signal line. The display control method includes: controlling a first sub-pixel in the first display area to display an image via the first signal line; and controlling a second sub-pixel in the second display area to display an image via the second signal line. A light-emission phase of the first sub-pixel at most partially overlaps a light-emission phase of the second sub-pixel.
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公开(公告)号：US20240057407A1
公开(公告)日：2024-02-15
申请号：US17754369
申请日：2021-04-30
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan , Pan Xu
IPC: H10K59/131 , H10K59/121
CPC classification number: H10K59/131 , H10K59/1213 , H10K59/1216
Abstract: A display substrate and a display device are provided. The display substrate includes: a plurality of pixel units arranged on a base substrate, each pixel unit includes a plurality of sub-pixels, and each sub-pixel includes a light emitting element and a pixel driving circuit; a semiconductor layer arranged on the base substrate; a first conductive layer arranged on a side of the semiconductor layer; and a second conductive layer arranged on another side of the semiconductor layer. The pixel driving circuit includes a driving transistor, a switching transistor and a sensing transistor; the switching transistor includes a first gate electrode and a first active layer; the display substrate further includes a channel defining portion for defining a channel region of the switching transistor, and an orthographic projection of the channel defining portion substrate at least partially overlaps an orthographic projection of the first active layer on the base substrate.
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公开(公告)号：US11854509B2
公开(公告)日：2023-12-26
申请号：US17802776
申请日：2021-10-13
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3688 , G09G2300/0842 , G09G2310/0278 , G09G2310/0286 , G09G2310/061
Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a plurality of sub-pixels, a plurality of groups of gate scan signal lines, and a plurality of groups of data lines. Each group of gate scan signal lines includes at least one gate scan signal line, each group of data lines includes n data lines, and the plurality of sub-pixels are arranged in an array; and n is greater than or equal to 2. A group of gate scan signal lines is electrically connected to n rows of sub-pixels. A column of sub-pixels is electrically connected to a group of data lines, and includes a plurality of groups of sub-pixels. Each group of sub-pixels includes n sub-pixels. The n sub-pixels are respectively electrically connected to n data lines in the group of data lines to which this column of sub-pixels is electrically connected.
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公开(公告)号：US11844255B2
公开(公告)日：2023-12-12
申请号：US17040606
申请日：2019-12-20
Inventor： Zhongyuan Wu , Yongqian Li , Zhidong Yuan , Meng Li , Can Yuan
IPC: H10K59/131 , H10K59/122 , H10K50/86 , H10K50/828 , H10K59/124 , H10K50/824 , H10K59/12 , H10K71/00 , H10K102/10 , H10K102/00
CPC classification number: H10K59/1315 , H10K50/824 , H10K50/828 , H10K50/865 , H10K59/122 , H10K59/124 , H10K59/131 , H10K71/00 , H10K59/1201 , H10K2102/102 , H10K2102/103 , H10K2102/3026
Abstract: A display panel includes a substrate, a pad, an auxiliary electrode layer, a data line layer, a first electrode layer, a light emitting layer, and a second electrode layer. The substrate has a display area and a peripheral area. The pad is disposed on a side of the substrate and located in the peripheral area. The auxiliary electrode layer is disposed on the same side of the substrate as the pad; the data line layer is disposed on a same layer as the auxiliary electrode layer; the first electrode layer is disposed on a side of the auxiliary electrode layer facing away from the substrate; the light emitting layer is disposed on a side of the first electrode layer facing away from the substrate; and the second electrode layer is disposed on a side of the light emitting layer facing away from the substrate and connected to the auxiliary electrode layer.
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95.发明授权公开(公告)号：US11842683B2
公开(公告)日：2023-12-12
申请号：US17620212
申请日：2020-12-23
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2320/0295 , G09G2320/045
Abstract: A display apparatus, a display panel, and a driving method thereof, and a method of detecting a pixel circuit are described. The display panel includes a pixel unit and a detection apparatus, and the pixel unit includes a pixel circuit and a light-emitting element. The pixel circuit includes a first transistor, a second transistor, a driving transistor, and a storage capacitor. The detection device is configured to: turn off the first transistor and the second transistor, and detect an amount of current leakage of the driving transistor leaked through the sensing line to obtain a first current leakage parameter; detect a first characteristic parameter of the driving transistor to obtain a first reference characteristic parameter; and determine a first target characteristic parameter according to the first current leakage parameter and the first reference characteristic parameter.
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Patent Agency Ranking
96.发明授权公开(公告)号：US11735119B2
公开(公告)日：2023-08-22
申请号：US17750804
申请日：2022-05-23
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan
IPC: G09G3/32 , G09G3/3266 , G11C19/28 , G09G3/3233
CPC classification number: G09G3/3266 , G11C19/28 , G09G3/3233 , G09G2310/0286 , G09G2310/061 , G09G2310/08
Abstract: A shift register unit and a control method thereof, a gate driving circuit and a control method thereof, and a display apparatus are provided. The shift register unit includes: a first shift register coupled to an input signal terminal, a first clock signal terminal and a second clock signal terminal. The first shift register is configured to generate a first output signal based on the signal at the first clock signal terminal and generate a second output signal based on the signal at the second clock signal terminal; and a second shift register coupled to the input signal terminal and a third clock signal terminal, the second shift register is configured to generate a third output signal based on the signal at the third clock signal terminal. The first shift register includes a first control circuit, a first output circuit and a second output circuit.
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公开(公告)号：US11539023B2
公开(公告)日：2022-12-27
申请号：US16577601
申请日：2019-09-20
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan , Enming Xie
Abstract: A display substrate and a manufacturing method thereof, and a display panel are provided. The display substrate includes a base substrate having a display region and a peripheral region adjacent to the display region, the peripheral region being provided therein with a gate driver-on-array circuit including a plurality of transistors and capacitors, all of the transistors are provided in a transistor region, at least a part of the plurality of capacitors are provided in a capacitor region, and the capacitor region is located on a side of the transistor region distal to the display region; and an encapsulation structure for encapsulating the display region and the transistor region together; the peripheral region further including a sealing region for arranging a sealing structure therein, the capacitor region is located in the sealing region, and the sealing region is provided on a side of the encapsulation structure distal to the display region.
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98.发明申请公开(公告)号：US20220284863A1
公开(公告)日：2022-09-08
申请号：US17750804
申请日：2022-05-23
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan
IPC: G09G3/3266 , G11C19/28
Abstract: A shift register unit and a control method thereof, a gate driving circuit and a control method thereof, and a display apparatus are provided. The shift register unit includes: a first shift register coupled to an input signal terminal, a first clock signal terminal and a second clock signal terminal. The first shift register is configured to generate a first output signal based on the signal at the first clock signal terminal and generate a second output signal based on the signal at the second clock signal terminal; and a second shift register coupled to the input signal terminal and a third clock signal terminal, the second shift register is configured to generate a third output signal based on the signal at the third clock signal terminal. The first shift register includes a first control circuit, a first output circuit and a second output circuit.
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公开(公告)号：US20220180816A1
公开(公告)日：2022-06-09
申请号：US17680956
申请日：2022-02-25
Inventor： Zhidong YUAN , Yongqian Li , Can Yuan , Pan Xu
IPC: G09G3/3275 , H01L27/32
Abstract: Provided is a display substrate. The display substrate includes two pixels arranged along a first direction and adjacent to each other on a base substrate, and a pixel circuit in each of the two pixels includes a drive transistor, a first reset transistor, and a second reset transistor. A display device is also provided.
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100.发明授权公开(公告)号：US11355070B2
公开(公告)日：2022-06-07
申请号：US16964712
申请日：2020-01-03
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan
IPC: G11C19/00 , G09G3/3266 , G11C19/28 , G09G3/3233
Abstract: Provided are a shift register unit and a control method thereof, a gate driving circuit and a control method thereof, and a display apparatus. The shift register unit may include: a first shift register coupled to an input signal terminal, a first clock signal terminal and a second clock signal terminal. The first shift register is configured to generate a first output signal based on the signal at the first clock signal terminal and generate a second output signal based on the signal at the second clock signal terminal; and a second shift register coupled to the input signal terminal and a third clock signal terminal, the second shift register is configured to generate a third output signal based on the signal at the third clock signal terminal; and a pull-up node of the first shift register is coupled to a pull-up node of the second shift register.
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