公开(公告)号：US20200274536A1

公开(公告)日：2020-08-27

申请号：US16285588

申请日：2019-02-26

Applicant: Xilinx, Inc.

Inventor： Rafael C. Camarota ,  Ui S. Han ,  Weiguang Lu

IPC: H03K19/177 ,  G06F17/50

Abstract: Examples described herein provide for a boundary logic interface (BLI) to a programmable logic region in an integrated circuit (IC), and methods for operating such IC. An example IC includes a programmable logic region and boundary logic interfaces. The programmable logic region includes columns of interconnect elements disposed between columns of logic elements. The boundary logic interfaces are at respective ends of and communicatively connected to the columns of interconnect elements. The boundary logic interfaces are outside of a boundary of the programmable logic region. A first boundary logic interface (BLI) of the boundary logic interfaces is configured to be communicatively connected to an exterior circuit. The first BLI includes an interface configured to communicate a signal between the exterior circuit and the programmable logic region.

公开(公告)号：US10763862B1

公开(公告)日：2020-09-01

申请号：US16285588

申请日：2019-02-26

Applicant: Xilinx, Inc.

Inventor： Rafael C. Camarota ,  Ui S. Han ,  Weiguang Lu

IPC: H03K19/17736 ,  G06F30/33

Abstract: Examples described herein provide for a boundary logic interface (BLI) to a programmable logic region in an integrated circuit (IC), and methods for operating such IC. An example IC includes a programmable logic region and boundary logic interfaces. The programmable logic region includes columns of interconnect elements disposed between columns of logic elements. The boundary logic interfaces are at respective ends of and communicatively connected to the columns of interconnect elements. The boundary logic interfaces are outside of a boundary of the programmable logic region. A first boundary logic interface (BLI) of the boundary logic interfaces is configured to be communicatively connected to an exterior circuit. The first BLI includes an interface configured to communicate a signal between the exterior circuit and the programmable logic region.