公开(公告)号：US20220286327A1

公开(公告)日：2022-09-08

申请号：US17193067

申请日：2021-03-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abishek MANIAN ,  Nithin Sathisan PODUVAL ,  Roland Nii Ofei RIBEIRO

IPC: H04L25/03 ,  H03K3/037 ,  H03M1/66

Abstract: An error sampler circuit includes a differential input voltage input, a differential reference voltage input, a master latch circuit, and a slave latch circuit. The master latch circuit includes a slicer circuit. The slicer circuit includes a first input, a second input, and a differential output. The first input is coupled to the differential input voltage input. The second input is coupled to the differential reference voltage input. The slave latch includes a differential input coupled to the differential output of the slicer circuit.

公开(公告)号：US20240163138A1

公开(公告)日：2024-05-16

申请号：US18419653

申请日：2024-01-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abishek MANIAN ,  Nithin Sathisan PODUVAL ,  Roland Nii Ofei RIBEIRO

IPC: H04L25/03 ,  H03K3/037

CPC classification number: H04L25/03057 ,  H03K3/0372

Abstract: An error sampler circuit includes a differential input voltage input, a differential reference voltage input, a master latch circuit, and a slave latch circuit. The master latch circuit includes a slicer circuit. The slicer circuit includes a first input, a second input, and a differential output. The first input is coupled to the differential input voltage input. The second input is coupled to the differential reference voltage input. The slave latch includes a differential input coupled to the differential output of the slicer circuit.

公开(公告)号：US20230122240A1

公开(公告)日：2023-04-20

申请号：US18066027

申请日：2022-12-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abishek MANIAN ,  Nithin Sathisan PODUVAL ,  Roland Nii Ofei RIBEIRO

IPC: H04L25/03 ,  H03K3/037

Abstract: An error sampler circuit includes a differential input voltage input, a differential reference voltage input, a master latch circuit, and a slave latch circuit. The master latch circuit includes a slicer circuit. The slicer circuit includes a first input, a second input, and a differential output. The first input is coupled to the differential input voltage input. The second input is coupled to the differential reference voltage input. The slave latch includes a differential input coupled to the differential output of the slicer circuit.