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公开(公告)号：US10141971B1
公开(公告)日：2018-11-27
申请号：US15815920
申请日：2017-11-17
Applicant: Silicon Laboratories Inc.
Inventor： Mohamed Elkholy , Ayman Shafik , Yang Gao , Arup Mukherji , Navin Harwalkar
Abstract: Embodiments of transceiver circuits disclosed herein include a first amplifier coupled to receive signals from an antenna during a receive (RX) mode of the transceiver circuit, a second amplifier coupled to transmit signals to the antenna during a transmit (TX) mode of the transceiver circuit, and a single impedance matching network coupled to the antenna and directly connected to a shared node to which the first and second amplifiers are directly connected. The single impedance matching network is configured to transform an impedance of the antenna into a resistance at the shared node. A control circuit is coupled to control the impedance transformation of the single impedance matching network, so as to provide a first resistance at the shared node during RX mode and a second resistance at the shared node during TX mode, wherein the second resistance is different from the first resistance.
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Patent Agency Ranking
公开(公告)号：US12015343B2
公开(公告)日：2024-06-18
申请号：US17537815
申请日：2021-11-30
Applicant: Silicon Laboratories Inc.
Inventor： Hatem Osman , Michael D. Mulligan , Mohamed Elkholy
CPC classification number: H02M3/157 , H02M1/0041
Abstract: In one embodiment, a method includes: enabling a pulse pair circuit of an integrated circuit in response to determining that a receiver associated with the integrated circuit is active; identifying that at least one comparator of a multi-output DC-DC converter trips, the DC-DC converter having a plurality of comparators each to compare a regulated voltage output by the DC-DC converter to a corresponding reference voltage; and generating, in the pulse pair circuit, a control pulse pair according to the tripped output, and driving a driver circuit of the DC-DC converter using the control pulse pair.
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公开(公告)号：US11323029B2
公开(公告)日：2022-05-03
申请号：US16857901
申请日：2020-04-24
Applicant: Silicon Laboratories Inc.
Inventor： Mohamed Elkholy , Anil Shirwaikar
Abstract: A DC-DC converter including converter circuitry, a voltage detector providing a low voltage signal, and pulse-pairing circuitry. The converter circuitry may be configured according to a buck or a boost configuration switching between a zero and peak current levels. The pulse-pairing circuitry includes a paired pulse generator, a load detector, and a maximum on timing controller. In response to the low voltage signal, the paired pulse generator activates an on signal for a pair of equal duration on pulses separated by a predetermined pulse separation interval. The on time periods are based on an adjustable time value and a peak current indication. The load detector provides a load adjust signal for adjusting the time value based on sampling the low voltage signal and an off time signal at the start of the second pulse. The maximum on timing controller adjusts the adjustable time value based on the load adjust signal.
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公开(公告)号：US20210336539A1
公开(公告)日：2021-10-28
申请号：US16857901
申请日：2020-04-24
Applicant: Silicon Laboratories Inc.
Inventor： Mohamed Elkholy , Anil Shirwaikar
Abstract: A DC-DC converter including converter circuitry, a voltage detector providing a low voltage signal, and pulse-pairing circuitry. The converter circuitry may be configured according to a buck or a boost configuration switching between a zero and peak current levels. The pulse-pairing circuitry includes a paired pulse generator, a load detector, and a maximum on timing controller. In response to the low voltage signal, the paired pulse generator activates an on signal for a pair of equal duration on pulses separated by a predetermined pulse separation interval. The on time periods are based on an adjustable time value and a peak current indication. The load detector provides a load adjust signal for adjusting the time value based on sampling the low voltage signal and an off time signal at the start of the second pulse. The maximum on timing controller adjusts the adjustable time value based on the load adjust signal.
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公开(公告)号：US20230170799A1
公开(公告)日：2023-06-01
申请号：US17537815
申请日：2021-11-30
Applicant: Silicon Laboratories Inc.
Inventor： Hatem Osman , Michael D. Mulligan , Mohamed Elkholy
CPC classification number: H02M3/157 , H02M1/0041
Abstract: In one embodiment, a method includes: enabling a pulse pair circuit of an integrated circuit in response to determining that a receiver associated with the integrated circuit is active; identifying that at least one comparator of a multi-output DC-DC converter trips, the DC-DC converter having a plurality of comparators each to compare a regulated voltage output by the DC-DC converter to a corresponding reference voltage; and generating, in the pulse pair circuit, a control pulse pair according to the tripped output, and driving a driver circuit of the DC-DC converter using the control pulse pair.
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公开(公告)号：US10128857B1
公开(公告)日：2018-11-13
申请号：US15876651
申请日：2018-01-22
Applicant: Silicon Laboratories Inc.
Inventor： Mohamed Elkholy , Ahmed Emira
Abstract: In one embodiment, a radio receiver includes: a programmable frequency synthesizer to generate a first clock signal; a first frequency divider to divide the first clock signal to generate a master clock signal; a second frequency divider to divide the master clock signal to generate a mixing signal; and a mixer to downconvert a radio frequency (RF) signal to a second frequency signal using the mixing signal. A voltage converter to couple to the radio receiver includes a switch controllable to switchably couple a first voltage to a storage device and a pulse generator to generate at least one pulse pair formed of a first pulse and a second pulse substantially identical to the first pulse, when a second voltage is less than a first threshold voltage, the second pulse separated from the first pulse by a pulse separation interval.
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